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Visitor ninode
Visitor
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Registered: ‎05-29-2017

PS BOOT

Hello, 

 

I'm using a Zedboard to run RISC-V cores on the PL and a RISC-V ported RTOS on the ARM. I have some questions regarding the boot process: 

 

The Linux config is done by having the device boot from the SD card which contains: 

  • boot.bin: Boot image for the Zynq*
  • uImage: ARM Linux
  • the RAMDisk containing the root filesystem
  • devicetree.dtb

*The boot.bin file is created by using these files: system.bit: FPGA bitstream, u-boot.elf: The ARM u-boot bootloader, zynq_fsbl.elf: First Stage Boot Loader (FSBL) and is not used directly by the FPGA.

 

1- Which file of the above should be modified to suit the RTOS (rather than linux) , or all of them even boot.bin ?

 

The Zynq data sheet, page 21 says that "Upon reset, the device mode pins are read to determine the primary boot device to be used: NOR, NAND, Quad-SPI, SD, or JTAG....The FSBL initiates the boot of the PS and can load and configure the PL, or configuration of the PL can be deferred to a later stage. The FSBL typically loads either a user application or an optional second stage boot loader (SSBL) such as U-Boot... The SSBL continues the boot process by loading code from any of the primary boot devices or from other sources such as USB, Ethernet, etc. If the FSBL did not configure the PL, the SSBL can do so, or again, the configuration can be deferred to a later stage."

 

2- Is it possible to have the PL programmed as a first step, in bare-metal config. Then have the RTOS on the ARM in a second config ? Since there are two stages of bootloader ?

3- Can I have the RTOS running on the ARM as a first step, then program the PL as a second step with a UART in a tethered configuration ?

4-Is the ARM crucial to PL config or the ARM and the PL can be programmed separately as in question 2 and 3 ? 

 

Thank you !

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