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Voyager
Voyager
2,864 Views
Registered: ‎05-09-2008

Peripheral with Synplify Pro ...

Hi,

 

I have to integrate a peripheral in EDK system. This peripheral must be synthesized with Symplify Pro and not with XST . I have organized the peripheral in this way:

 

 

Peripheral
|
\----- data
| |
| \----- peripheral_v2_1_0.bbd
| \----- peripheral_v2_1_0.mpd
| \----- peripheral_v2_1_0.pao
|
\----- hdl
| |
| \----- vhdl
| |
| \----- No File
|
\----- netlist
|
\----- peripheral.edn (Generate with Symplify Pro)
\----- fifo_2kx8.ngc

 

peripheral_v2_1_0.bbd

 

 

Files
peripheral.edn, fifo_2kx8.ngc

 

peripheral_v2_1_0.mpd

 

 

BEGIN peripheral

## Peripheral Options
OPTION IPTYPE = PERIPHERAL
OPTION IMP_NETLIST = FALSE
OPTION HDL = VHDL
OPTION IP_GROUP = MICROBLAZE:PPC:USER
OPTION STYLE = MIX
OPTION RUN_NGCBUILD = TRUE

## Bus Interfaces

## Generics for VHDL or Parameters for Verilog

## Ports

...

END

 

 

peripheral_v2_1_0.pao

 

File is empty.

 

I then imported pcore on EDK project and made all the necessary connections without error. I start the generation of bitstream but there are always errors that do not understand.

 

Anyone knows the exact procedure to import a pcore presynthetized with Symplify ?

 

Thanks very much.

 

secureasm


 

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2 Replies
Xilinx Employee
Xilinx Employee
2,821 Views
Registered: ‎08-01-2007

Re: Peripheral with Synplify Pro ...

Is the error info related to the IO Buffer or IOBs?

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Xilinx Employee
Xilinx Employee
2,820 Views
Registered: ‎08-01-2007

Re: Peripheral with Synplify Pro ...

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