07-09-2010 06:31 AM
I have to integrate a peripheral in EDK system. This peripheral must be synthesized with Symplify Pro and not with XST . I have organized the peripheral in this way:
| \----- peripheral_v2_1_0.bbd
| \----- peripheral_v2_1_0.mpd
| \----- peripheral_v2_1_0.pao
| \----- vhdl
| \----- No File
\----- peripheral.edn (Generate with Symplify Pro)
Files peripheral.edn, fifo_2kx8.ngc
BEGIN peripheral ## Peripheral Options OPTION IPTYPE = PERIPHERAL OPTION IMP_NETLIST = FALSE OPTION HDL = VHDL OPTION IP_GROUP = MICROBLAZE:PPC:USER OPTION STYLE = MIX OPTION RUN_NGCBUILD = TRUE ## Bus Interfaces ## Generics for VHDL or Parameters for Verilog ## Ports ... END
File is empty.
I then imported pcore on EDK project and made all the necessary connections without error. I start the generation of bitstream but there are always errors that do not understand.
Anyone knows the exact procedure to import a pcore presynthetized with Symplify ?
Thanks very much.