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Visitor ali.ebrahimi
Visitor
6,470 Views
Registered: ‎12-08-2013

Problem with LVDS signal transfer from input to output

Hi,

 

I need to simply carry a differnatil signal from a pair of input to a pair of differntial output, but it doesn't work.

I have the following code on the PL part of a zynq-7000:

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VComponents.all;

entity LDA_Fanout is
    Port ( CLK_IN_P  : in  STD_LOGIC;
           CLK_IN_N     : in  STD_LOGIC;
           CLK_OUT_P : out STD_LOGIC;
           CLK_OUT_N : out STD_LOGIC;
           LD0                : out STD_LOGIC);
end LDA_Fanout;

architecture data_flow of LDA_Fanout is

signal clk_lvcmos : STD_LOGIC;

begin

    -- LVDS input to internal single
    CLK_IBUFDS : IBUFDS
    generic map(
        IOSTANDARD => "DEFAULT"
    )
    port map(
        I    => CLK_IN_P,
        IB => CLK_IN_N,
        O  => clk_lvcmos
    );
    
    -- Internal single to LVDS output  
    CLK_OBUFDS : OBUFDS
    generic map(
        IOSTANDARD => "DEFAULT"
    )
    port map(
        O   => CLK_OUT_P,
        OB => CLK_OUT_N,
        I     => clk_lvcmos
    );

end data_flow;

 

and the UCF file is:

# Input clock differential pair
NET CLK_IN_N LOC = C20  | IOSTANDARD=LVDS_25 | DIFF_TERM = TRUE;  # "FMC-LA18_CC_N"
NET CLK_IN_P LOC = D20  | IOSTANDARD=LVDS_25 | DIFF_TERM = TRUE;  # "FMC-LA18_CC_P"

# Output clock differential pair
NET CLK_OUT_N    LOC = G21  | IOSTANDARD=LVDS_25;  # "FMC-LA20_N"
NET CLK_OUT_P    LOC = G20  | IOSTANDARD=LVDS_25;  # "FMC-LA20_P"

 

If I use only the IBUFDS, sending out its output on a LVCMOS pin works fine. I just can't send it out as LVDS_25.

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6 Replies
Teacher muzaffer
Teacher
6,464 Views
Registered: ‎03-31-2012

Re: Problem with LVDS signal transfer from input to output

What doesn't work? What do you observe?

Can you send out the clk_lvcmos signal to pin # G20 (clk_out_p) and G21 as single ended? Are you saying that works on both pins but when you put in the OBUFDS you don't observe any output? How do you probe for an LVDS signal?
- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Visitor ali.ebrahimi
Visitor
6,461 Views
Registered: ‎12-08-2013

Re: Problem with LVDS signal transfer from input to output

I have no output on the differential output (G21 and G22) when I check with a scope. All I get is a rising edge when I put the probe and it immediately disappears. I checked with and without 100 Ohms termination resistor at the output.

I can not try to send LVCMOS signals to G20 and G21 since they are located on the same bank as C20 and D20 which are used as differential. But I tried to use two other differential pins and it was the same.
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Teacher muzaffer
Teacher
6,458 Views
Registered: ‎03-31-2012

Re: Problem with LVDS signal transfer from input to output

 

I have no output on the differential output (G21 and G22) when I check with a scope. All I get is a rising edge when I put the probe and it immediately disappears.

 

LVDS has a 1.2 V commond mode with approximately 300mVpp signal over that. Set your scope to 500mV per square and probe each line in the pair with a trigger of 1V. You should see the LVDS signal if it exists. Use a differential probe if you have it.

 

I can not try to send LVCMOS signals to G20 and G21 since they are located on the same bank as C20 and D20 which are used as differential.

 

That does not make sense. You can mix single ended and differential signal in the same bank. Make sure that you can drive your output in a single ended fashion first to check for the pin assignment. Then try obufds again.

 

- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Visitor ali.ebrahimi
Visitor
6,454 Views
Registered: ‎12-08-2013

Re: Problem with LVDS signal transfer from input to output

Thank you for your answer. I tested the the output in single ended mode to both G20 and G21 and it works fine. I don't understand why it doesn't work when I use OBUFDS.

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Teacher muzaffer
Teacher
6,452 Views
Registered: ‎03-31-2012

Re: Problem with LVDS signal transfer from input to output

Make sure you probe the LVDS signal properly. Can you see the input LVDS signal?
- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
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Visitor ali.ebrahimi
Visitor
6,448 Views
Registered: ‎12-08-2013

Re: Problem with LVDS signal transfer from input to output

Yes I do see the input LVDS.

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