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Observer zuzu@123
Observer
261 Views
Registered: ‎11-29-2018

SPI Loopback

Hey,

I am trying to do a SPI loopback with enabling only one SPI(spi0) and using that spi0 as master and slave  

What I have done till now is that I have connected

1) SCLK_i to SCLK_0

2) MISO input to MISO output

3) MOSI output to MOSI input

4) Slave select inut to slave select output.

I want to check the loopback within one SPI only (which will have one master and one slave).

Can you please guide what I should do next. Kindly consider.

Regards

Manisha

 

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10 Replies
Community Manager
Community Manager
235 Views
Registered: ‎07-23-2015

Re: SPI Loopback

zuzu@123  Can you provide more details like below so that the concerned experts can comment

  1. Which device and Part# of the device?
  2. Using Evaluation board or custom board?
  3. Custom IP ?
  4. How are you looping back on the board?
- Giri
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There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
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Observer zuzu@123
Observer
227 Views
Registered: ‎11-29-2018

Re: SPI Loopback

Hi,

Thanks for the reply.

1) Board ZCU102 

2) ZCU102 Evaluation Board.

3) I am using Zynq Mpsoc and in that enabling SPI0

4) By enabling SPI0 in ZYNQ Mpsoc IP and SPI0 will have one master and one slave and I want to loopback within same board b/w master and slave . 

What I have done till now is that I have connected

1) SCLK_i to SCLK_0

2) MISO input to MISO output

3) MOSI output to MOSI input

4) Slave select inut to slave select output.

I do not know what to do next like what how to write in SDK for the loopback and how can I check the loopback b/w the master and the slave.

Some suggestions would be really Appreciated. Kindly Consider.

Regards

Manisha

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Xilinx Employee
Xilinx Employee
217 Views
Registered: ‎07-12-2018

Re: SPI Loopback

Hi zuzu@123 

In the ZynqMp PCW select SPI0 EMIO, but don't make them external as you are not interested in the external loopback.

As shown the in figure just connect emio_spi0_m_i to emio_spi0_m_o. No need of connecting the sclk and ss pins.

Try this way and let me know for further queries if any.

Best Regards
Abhinay PS
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Observer zuzu@123
Observer
192 Views
Registered: ‎11-29-2018

Re: SPI Loopback

Hi,

Yes I've connected ZynqMP and selected SPI0 EMIO and I'm doing the connections as shown below. Please let me know if my connections are wrong for using SPI0 as both master and slave and trying the loopback. Happy to have suggestions.

 

Regards

Manisha 

Screenshot (16).png

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Xilinx Employee
Xilinx Employee
186 Views
Registered: ‎07-12-2018

Re: SPI Loopback

Hi zuzu@123 

Yes, you can proceed with this connections for the loopback and run any application to test it. 

Please let me know for further queries if any. 

Best Regards
Abhinay PS
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Observer zuzu@123
Observer
167 Views
Registered: ‎11-29-2018

Re: SPI Loopback

Hi,

But I don't know what can be done next like the SDK part and how to check the loopback like from where the SPI will get the data . Also i am not sure how can i find out that the  data being transmitted by Master is being received by Slave or not.

 

Regards

Manisha

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Xilinx Employee
Xilinx Employee
155 Views
Registered: ‎07-12-2018

Re: SPI Loopback

Hi zuzu@123 

After generating the bitstream, export the hardware file and launch XSDK. Create an application project where you have multiple examples. 

Select flash polled example and modify the code such that the write some data into the TX buffer then send it to the RX buffer, now you can verify by reading the status of the Buffers through registers.

You can also probe an ILA and check if the data is transferring.

Best Regards
Abhinay PS
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Observer zuzu@123
Observer
121 Views
Registered: ‎11-29-2018

Re: SPI Loopback

Hi,

Really Thanks for your suggestion.

So I have used flash polled example and if i will modify the code that to write some data into the TX buffer then send it to the RX buffer but then for that do i need to program by device through QSPI Flash and for that I would be requiring boot.bin files right?

or do we have another option of like programming through JTAG only and then their can be any way out to check the data transfer b/w Tx and Rx buffers? 

Happy to have suggestions.

Regards

Manisha 

 

 

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Xilinx Employee
Xilinx Employee
109 Views
Registered: ‎07-12-2018

Re: SPI Loopback

Hi zuzu@123 

Just follow the steps given below for running the baremetal application through JTAG.

1. Right click on the polled mode example and open the run configurations.

2. In the dialogue check the application part whether it is the exact elf file you are loading on to the device.

3. Open any terminal to check the print statements.

You can refer the below link for the documentation of the XSDK how to run a program through JTAG.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_1/SDK_Doc/index.html

Please let me know for further queries if any.

Best Regards
Abhinay PS
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Give kudos to a post which you think is helpful and reply oriented.
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Observer zuzu@123
Observer
59 Views
Registered: ‎11-29-2018

Re: SPI Loopback

Hi,

Actually I was asking that If I will use this flash polled example and if i will modify the code that to write some data into the TX buffer then send it to the RX buffer then then for that do i need to program by device through QSPI Flash and for that I would be requiring boot.bin files right?

Because this particular example uses reads and writes data from a serial flash so I am asking is that can we not do this read and write to the buffer register through JTAG ?

So like i have to program my board through flash only?

Happy to have suggestions.

Regards

Manisha Naryal

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