10-06-2015 06:46 AM
Im new to Vivado and according to my previous experience in EDK it was possible to create IP-core with AXI-full memory mapped interface with two separate memory spaces which belong to this IP-core.
In Vivado Design Suite it is possible to create AXI-Full IP-core with only one memory space, but generated source file contains USER_NUM_MEM parameter and
constant USER_NUM_MEM: integer := 1
Is it possible in Vivado somehow make IP-core with two address spaces ?
10-19-2015 10:00 AM
10-06-2015 11:03 PM
To solve the problem, may be it is a good idea to eleborate the IP-core in EDK and then Package IP for Vivado by means of Tool -> Create and package IP, but the package tool does not recognize AXI interconnect slave interface in user IP-cores made by means Create and Import perepherial Wizard in EDK.
Does somebody have any idea how to make the Vivado to recognize te AXI interface in user IP-cores?
10-19-2015 10:00 AM
10-21-2015 06:51 AM
You can create multiple address ranges for a single slave either by packaging it with multiple regions or using tcl commands to add address ranges within IPI.
And I believe that you can use a parameter to enable/disable regions. But, this mechanism is not fully documented yet at this time.
When you create a new core using Vivado IP Package menu, take a look at the created source. There is a bd.tcl file which gives you the flexability to read and update parameters as the IPI block is validated. You may have to look at other IP sources to get an idea of the flexability within bd.tcl.
10-30-2015 12:56 AM
Thank you for such an exhaustive answer, stephenm. The method provided is quite reasonable, but I think the disadvantage is that i should manually check the coinsedence of the HIGH/LOW addresses in IP-core parameters and in Address Editor.
10-30-2015 02:30 AM
Yes, this feature isa to be added in 2016.1 (having multi address ranges in the IP packager) it will all be cleaned up. this document was created for another user that needed this ability now so this is a hack