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Visitor mprocca
Registered: ‎03-11-2015

XC7Z020 core 0 seems to interfere with core1 SPI

I've setup a XC7Z020 with Linux on core 0 and a bare metal application on core 1.


The bare metal application on core 1 is using SPI within the PS. I've not done anything in Linux on core 0 to use the SPI periperhal.


The SPI registers will all be forced to zero if I allow Linux to come up on core 0. However, if I stop core 0 within U-boot and connect to core 1 with the SDK debugger, the SPI registers are not forced to zero and SPI will work properly. The only way I found to get SPI to work with Linux running was to add SPI  to the DTB for Linux and delay its initialization on bare metal.


I recently added I2C to bare metal on core 1 and am having similar problems but a similar workaround to the SPI problem is not working.


I suspect the root cause is the same for both these problems -  any ideas?






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