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Observer timing@idt
Observer
193 Views
Registered: ‎06-07-2018

ZCU102: how to route a user provide clock to the FPGA design

Hi everyone

 

I have a ZCU102 and I implemented a FPGA based RTC timer. Now I want to use a external user provide clock to drive the timer.  Originally, I want to use the USER_SMA_MGT_CLOCK on pin J27/28. The reason is that they have SMA connector and easy to for the purpose. But it couldn't get it work since the synthesizer wouldn't allow me to place the PIN to the differential port that I created. I figured it would be due to the fact that the USER_SMA_MGT_CLOCK is only meant for reference clock for the GTH tranceivers.

So I guess my question is how to route that USER_SMA_MGT_CLOCK into my FPGA design or if there is any other way to provide my own clock to the FPGA design.

Thanks

Min

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2 Replies
Xilinx Employee
Xilinx Employee
139 Views
Registered: ‎08-25-2010

回复: ZCU102: how to route a user provide clock to the FPGA design

Hi

Yes, this pin is a dedicated clock to GTH. So you need to connect interconnect logic via BUFG_GT through ODIV2 of IBUFDS_GTE4 as below.
You may refer to figure 2-39, ug576(v1.5.1):
http://www.xilinx.com/support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf



Thanks
Simon
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Adventurer
Adventurer
127 Views
Registered: ‎10-04-2018

Re: ZCU102: how to route a user provide clock to the FPGA design

You need to be careful when you bring external clock into the FPGA. Use FPGA dedicated resources for that such as BUFG, BUFGE and so on.

You need to make the FPGA to use its own clocking resources for external clock routing to its internal blocks.

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