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Participant watman
Participant
6,630 Views
Registered: ‎05-19-2010

can't get VDMA -> AXI stream -> video out to work

I have been trying for days to get video output on a Zedboard, but am having a lot of trouble.

VGA or DVI/HDMI, either is fine but I have had different problems with each.

I'm using the latest 14.4 tools.

 

I have tried to work out the relevant parts from several reference designs:

VDMA data sheet

Building a video design from scratch

Avnet HDMI FMC video design

Analog ADV7511 reference design for Zynq

 

The examples all seem to have a video in component, so maybe because I only want video out I have something set incorrectly, although I have tried to adjust where necessary.

So I am trying to just get the minimal parts working: VDMA, timing controller, and stream to video out.

To make it even simpler I am using standard VGA resolution, and sending the signals to the analog VGA port on the Zedboard.

 

The timing seems ok, I could get a display with just TPG, timing, and stream to out cores.

 

When the VDMA is activated, I can see action on the AXI stream bus but the AXI-stream-to-video doesn't pass anything through and it never asserts LOCKED. I have attached some chipscope plots.

cs_timing.png

cs_axi.png

 

I am setting up the VDMA according to the software examples, removing the s2mm parts.

The video clock is generated from an MCMM in the logic (25 MHz for VGA).

 

Areas that I'm not completely sure about:

fsync connections and settings

genlock setting

various master/slave settings

clock domains

 

I would greatly appreciate any ideas, this is starting to frustrate me!

The MHS file is attached, if that doesn't help I could attach the whole project.

 

Thanks!

 

Daniel

6 Replies
Xilinx Employee
Xilinx Employee
6,614 Views
Registered: ‎08-02-2011

Re: can't get VDMA -> AXI stream -> video out to work

Hey Daniel,

 

Would you say that the VTC VTIMING_OUT signals look correct? I can't quite tell because I can't see vsync.

www.xilinx.com
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Participant watman
Participant
6,595 Views
Registered: ‎05-19-2010

Re: can't get VDMA -> AXI stream -> video out to work

Hi bwiec,

 

Thanks for your reply.

 

I assumed that vsync was ok because the other signals were fine... but I just tried triggering chipscope on edges and apparently it doesn't change!

 

I have changed the stream to out to slave mode, so I'll try and figure out what happened to vsync...

 

Daniel

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Visitor vineshp
Visitor
6,477 Views
Registered: ‎03-29-2013

Re: can't get VDMA -> AXI stream -> video out to work

Hello Daniel,

Were you able to rootcause this issue ? Could you please know if it was indeed Vsync problem ?

 

 

Thanks

Vinesh

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Participant watman
Participant
6,470 Views
Registered: ‎05-19-2010

Re: can't get VDMA -> AXI stream -> video out to work

Hi Vinesh,

 

I remade the design, and Vsync was correct but I still got no output.

 

The only way I was able to get any output was to add a video-in-to-AXI or test pattern generator connected to the S2MM port of the VDMA, as then the VDMA settings are the same as in the example designs.

 

I'm sure it is one tiny setting somewhere, but with 20mins to re implement each time I haven't been able to figure out what it is.

 

If you figure it out, please post!

 

Daniel

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Visitor cherednik
Visitor
6,329 Views
Registered: ‎06-09-2009

Re: can't get VDMA -> AXI stream -> video out to work

Hi Daniel,
I have been trying several days to get video output on a Zedboard too.
I have not any output.
Please give me your MHS file where you "was able to get any output was to add a video-in-to-AXI or test pattern generator connected to the S2MM port of the VDMA".

 

Cherednik

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Visitor hsaeed
Visitor
5,528 Views
Registered: ‎01-27-2014

Re: can't get VDMA -> AXI stream -> video out to work

Hello all,
I know there would be some one who can help me in solving the problem.

when i run the reference design

http://wiki.analog.com/resources/fpga/xilinx/kc705/adv7511

on ZEDBoard from SDK.

I see the following output on terateam.

********************************************************************
ADI HDMI Trasmitter Application Ver R1.1.1
HDMI-TX: ADV7511 Rev 0x14
Created: Jan 24 2014 At 17:39:03
********************************************************************

To change the video resolution press:
'0' - 640x480; '1' - 800x600; '2' - 1024x768; '3' - 1280x720
'4' - 1360x768; '5' - 1600x900; '6' - 1920x1080.
Mute audio and video.
APP: Driver Enabled
HPD changed to HI
MSEN changed to LOW
A new EDID segment was read.
DVI device.
------------------------- EDID BLOCK 0 -------------------------
Edid Version 1.3
Mon Timing:
Pixel clock = 108.0 MHz
H Active = 1280
V Active = 1024
Progressive
No stereo
Separate sync = 3
+ve VSync
+ve HSync
Mon Freq:
Min V Freq = 56 Hz
Max V Freq = 85 Hz
Min H Freq = 30 KHz
Max H Freq = 81 KHz
Mon Name: 170T Digital

Mon Serial: H4URA09215

Edid extensions blocks: 0
########################### EDID END ###########################

MSEN changed to HI
APP: Changed system mode to Transmitter
Un-mute audio and video.
MSEN changed to LOW
APP: Changed system mode to Disconnected
Mute audio and video.

can any one suggest what does it mean?
how can i see some image or video?

Thanks in advance.
Regards
Hamid

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