06-29-2018 02:06 AM
Do anybody know if you "should" or "should not" generate output products before packing a IP whit a smartconnect. I get error in the synthesis in some of the files that has been generated in the "generate output product phase". Also the smartconnect is directly connected to the output of the IP so as you can not control the width of the different interfaces will you not need to generate the output product for the design you are using the IP not the one you are packing? as the smartconnect adapts to the environment?
I pack IP with the .xci not the underlying IP scources.
07-09-2018 04:34 AM
The ipi is just a graphical representation of your design. During generate output products, this would create the elaborated design. The elaborated design contains all the actual RTL code to synth the design. Im not sure if the tools will generate the output products if it destroys a bd in the packaged IP or not. So best to do it before you package the bd. So the rtl is available.
What error messages do you see?
10-12-2018 07:08 AM
Sorry for the extremely late reply. I did not see your answer as I forgot to subscribe. I get synthesise Errors:
[Synth 8-1031] T_SC_AWUSER_WIDTH is not declared ["prj/prj.srcs/sources_1/bd/design_1/ipshared/0114/sim/sc_util_v1_0_2_structs.svh":51]
I get two version of this file in the packed IP. one in the <IP packed directory>/src and one in the <IP packed directory>/src/smartconnect_v1_0 directory
As you probably see the Error message points to a file in the "sim" directory of the design it is used in, so a "fix" that we have used for now is to delete these files. it seams to still work correct. but this is not something we would like to continue with.