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Observer fkharrat
Observer
7,261 Views
Registered: ‎09-04-2015

problem ov7670 with vdma

Hello,

 

I work on a project : display a video capted by OV7670 on a VGA screen via a VDMA implementer for the zedboard (vivado 2013.4), i use the project of Lauri http://lauri.xn--vsandi-pxa.com/cache/c9e26b07f5904f12928a883f1a914073.png 

i can't integrete the axi_subset_converter IP in my design, when i used i got many error.

 

So i changed the ov7670_axi_stream_captor IP to a other IP with 24 bit output data (to 24-bit RGB (8:8:8)), but i got a false image, 

my design :

OV7670_axi_stream_captor_24 => VDMA ( 24 bit input / 24 bit output ) => Video out ( RGB , 8bit) => rgbtovga (24 bit input)

 

I can't fixed the source of this error, it's problem of color (rgbtovga IP) or problem of I2C ( ov7670_controller ) ?

 

 

 

Thanks,

imagebleu.JPG
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3 Replies
Xilinx Employee
Xilinx Employee
7,251 Views
Registered: ‎08-02-2011

Re: problem ov7670 with vdma

This could be any number of things, but it doesn't look like anything specifically with the VDMA.

I'd put a TPG before (and maybe after) the VDMA and see if the output path looks right. I'd also start probing data at different points and see where it's going wrong.
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Observer fkharrat
Observer
7,236 Views
Registered: ‎09-04-2015

Re: problem ov7670 with vdma

Yes i used the tpg Ip and it's working.

but i doubt that the problem is around the convertesion 32bit to 24 bit :

 

***i used before a VDMA with 32bit input and 24bit output => i got a false image

(my IP ov7670_capteur have a 32bit output : RGBA 8888 / and my IP ov7670_vga have a 24bit input : RGB 888 ) 

 

*** and when i used a other Ip ov7670_capteur with   24bit output ( RGB 8888) i got also false image => 

 can you tell me when i change the ip ov7670_capteur  i shoud changed the controleur of I2C IP ??

 

*** and when i used a AXI_subset_converter , i got many error in vivado 

 

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Xilinx Employee
Xilinx Employee
7,229 Views
Registered: ‎08-02-2011

Re: problem ov7670 with vdma

What errors are you getting with the subset converter. I'd pull up the post-synthe schematic and make sure you're picking off the right bits.

Beyond that, ILAs at various nodes in the datapath.
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