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Visitor
Visitor
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Registered: ‎05-16-2019

10G Ethernet Subsystem base design

Hi,

I am using a Kintex Ultrscale XCKU040 to interface with a 10G transceiver through PCB lanes. I am trying to figure out the most basic 10G Ethernet Subsystem design to do this. I really only need to tell the Subsystem to send data out on the TX line. We will be monitoring the transceiver to see if data was received. 

From everything I have read, I am not sure if I need a Microblaze System, AXI, DMA, FIFO, or packet generator. It seems that there is not a clear cut solution to implement this.

Maybe I am just overthinking this and I need to connect an AXI lite and just interface with those pins to send data.

 

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Moderator
Moderator
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Registered: ‎11-09-2017

Re: 10G Ethernet Subsystem base design

Hi @monnen 

It depends on your application, yes you can implement through Microblaze System.

Seems that you are looking to monitor the TX data, core provides example design(packet generator/checker).

Example design can be simulated (test bench available) and also implemented.

Right click on .xci file and select open example design, further details can find at product guide.

Regards
Pratap

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Visitor
Visitor
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Registered: ‎05-16-2019

Re: 10G Ethernet Subsystem base design

Hi Pratap,

Yeah I have looked at the example design. I feel it's more complicated than I need.

Is there a way I can tell the Microblaze to start sending data WITHOUT needing an external program.

Such as, can I send a reset to the system and have the Microblaze start sending instructions to the subsystem, which would then send data out to our transceiver.

Thanks,

 

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