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329 Views
Registered: ‎02-03-2020

10G MAC IP Example Design ERROR when processed with padded frames

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Hi, I found a problem when I simulated with the 10G MAC example design. I set the mode to be DEMO and only send frame3 which is a padded frame. I could get correct frame without pads which were removed by the core. Then I modified the frame3, as follows, I couldn't get the frame for the rx_axis_tuser was deasserted by the core. I tried many times and found if the length is between 16'h0001~16'h001a,  I could get correct frames without pads. But  if the length is between 16'h001b~16'h002d,the rx_axis_tuser is deasserted by the core. why? I didn't modify other codes but frame3

 

original frame3 -given by xilinx

捕获.PNG

modified frame3 - could receive correct frame without pads 

modified frame3modified frame3

modified frame3 - couldn't  receive correct frame for the rx_axis_tuser is deasserted by the core

捕获3.PNG

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Xilinx Employee
Xilinx Employee
274 Views
Registered: ‎05-01-2013

Yes, I think it's the bug.

Disable IP core L/T check to workaround it.

View solution in original post

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Xilinx Employee
Xilinx Employee
275 Views
Registered: ‎05-01-2013

Yes, I think it's the bug.

Disable IP core L/T check to workaround it.

View solution in original post