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crepe
Observer
Observer
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Registered: ‎03-29-2019

AXI 1G/2.5G Ethernet Subsystem: No interrupts asserted in Tx path

Hello!

When using AXI 1G/2.5G Ethernet subsystem (DMA configuration), sometimes 'net eth1: No interrupts asserted in Tx path' appears in petalinux's console. I used this guide to create my block design: mm2s_introut, s2mm_introut, mac_irq and interrupt signals are connected to zynq block (through concat). Device tree is automatically generated, so i didn't change it except specify 'rgmii-id' and adding TX-skews to run 1G. System-user.dtsi is:

 

&eth_channel_0_axi_ethernet_0 {    		
    	phy-handle = <&phy1>;
    	phy-mode = "rgmii-id";
	local-mac-address = [00 0a 35 00 22 02];
   	eth_channel_0_axi_ethernet_0_mdio: mdio {
        	#address-cells = <1>;
        	#size-cells = <0>;
        	phy1: phy@3 {
            		device_type = "ethernet-phy";
            		reg = <3>;
			txen-skew-ps = <900>; 
			txd0-skew-ps = <900>; 
			txd1-skew-ps = <900>; 
			txd2-skew-ps = <900>; 
			txd3-skew-ps = <900>; 
       		};
    	};
};

 

 pl.dtsi is:

 

eth_channel_0_axi_ethernet_0: ethernet@41000000 {
			axistream-connected = <&eth_channel_0_axi_ethernet_0_dma>;
			axistream-control-connected = <&eth_channel_0_axi_ethernet_0_dma>;
			clock-frequency = <100000000>;
			clock-names = "s_axi_lite_clk", "axis_clk", "gtx_clk", "ref_clk";
			clocks = <&clkc 15>, <&clkc 15>, <&misc_clk_0>, <&misc_clk_1>;
			compatible = "xlnx,axi-ethernet-7.1", "xlnx,axi-ethernet-1.00.a";
			device_type = "network";
			interrupt-names = "mac_irq", "interrupt";
			interrupt-parent = <&intc>;
			interrupts = <0 52 1 0 53 4>;
			local-mac-address = [00 0a 35 00 00 00];
			phy-mode = "rgmii";
			reg = <0x41000000 0x10000>;
			xlnx = <0x0>;
			xlnx,axiliteclkrate = <0x0>;
			xlnx,axisclkrate = <0x0>;
			xlnx,clockselection = <0x0>;
			xlnx,enableasyncsgmii = <0x0>;
			xlnx,gt-type = <0x0>;
			xlnx,gtinex = <0x0>;
			xlnx,gtlocation = <0x0>;
			xlnx,gtrefclksrc=<0x0>;
			xlnx,include-dre ;
			xlnx,instantiatebitslice0 = <0x0>;
			xlnx,phy-type = <0x3>;
			xlnx,phyaddr = <0x1>;
			xlnx,phyrst-board-interface-dummy-port = <0x0>;
			xlnx,rable = <0x0>;
			xlnx,rxcsum = <0x0>;
			xlnx,rxlane0-placement = <0x0>;
			xlnx,rxlane1-placement = <0x0>;
			xlnx,rxmem = <0x1000>;
			xlnx,rxnibblebitslice0used = <0x0>;
			xlnx,tx-in-upper-nibble = <0x1>;
			xlnx,txcsum = <0x0>;
			xlnx,txlane0-placement = <0x0>;
			xlnx,txlane1-placement = <0x0>;
			eth_channel_0_axi_ethernet_0_mdio: mdio {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

eth_channel_0_axi_ethernet_0_dma: dma@41010000 {
			#dma-cells = <1>;
			axistream-connected = <&eth_channel_0_axi_ethernet_0>;
			axistream-control-connected = <&eth_channel_0_axi_ethernet_0>;
			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
			clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>;
			compatible = "xlnx,eth-dma";
			interrupt-names = "mm2s_introut", "s2mm_introut";
			interrupt-parent = <&intc>;
			interrupts = <0 53 4 0 54 4>;
			reg = <0x41010000 0x10000>;
			xlnx,include-dre ;

 

System.dtb:

 

		ethernet@41000000 {
			axistream-connected = <0x9>;
			axistream-control-connected = <0x9>;
			clock-frequency = <0x5f5e100>;
			clock-names = "s_axi_lite_clk", "axis_clk", "gtx_clk", "ref_clk";
			clocks = <0x1 0xf 0x1 0xf 0xa 0xb>;
			compatible = "xlnx,axi-ethernet-7.1", "xlnx,axi-ethernet-1.00.a";
			device_type = "network";
			interrupt-names = "mac_irq", "interrupt";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x34 0x1 0x0 0x24 0x4>;
			local-mac-address = [00 0a 35 00 22 02];
			phy-mode = "rgmii-id";
			reg = <0x41000000 0x10000>;
			xlnx = <0x0>;
			xlnx,axiliteclkrate = <0x0>;
			xlnx,axisclkrate = <0x0>;
			xlnx,clockselection = <0x0>;
			xlnx,enableasyncsgmii = <0x0>;
			xlnx,gt-type = <0x0>;
			xlnx,gtinex = <0x0>;
			xlnx,gtlocation = <0x0>;
			xlnx,gtrefclksrc=<0x0>;
			xlnx,include-dre;
			xlnx,instantiatebitslice0 = <0x0>;
			xlnx,phy-type = <0x3>;
			xlnx,phyaddr = <0x1>;
			xlnx,phyrst-board-interface-dummy-port = <0x0>;
			xlnx,rable = <0x0>;
			xlnx,rxcsum = <0x0>;
			xlnx,rxlane0-placement = <0x0>;
			xlnx,rxlane1-placement = <0x0>;
			xlnx,rxmem = <0x1000>;
			xlnx,rxnibblebitslice0used = <0x0>;
			xlnx,tx-in-upper-nibble = <0x1>;
			xlnx,txcsum = <0x0>;
			xlnx,txlane0-placement = <0x0>;
			xlnx,txlane1-placement = <0x0>;
			phy-handle = <0xc>;
			linux,phandle = <0xd>;
			phandle = <0xd>;

			mdio {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				phy@3 {
					device_type = "ethernet-phy";
					reg = <0x3>;
					txen-skew-ps = <0x384>;
					txd0-skew-ps = <0x384>;
					txd1-skew-ps = <0x384>;
					txd2-skew-ps = <0x384>;
					txd3-skew-ps = <0x384>;
					linux,phandle = <0xc>;
					phandle = <0xc>;
				};
			};
		};

		dma@41010000 {
			#dma-cells = <0x1>;
			axistream-connected = <0xd>;
			axistream-control-connected = <0xd>;
			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
			clocks = <0x1 0xf 0x1 0xf 0x1 0xf 0x1 0xf>;
			compatible = "xlnx,eth-dma";
			interrupt-names = "mm2s_introut", "s2mm_introut";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x35 0x4 0x0 0x36 0x4>;
			reg = <0x41010000 0x10000>;
			xlnx,include-dre;
			linux,phandle = <0x9>;
			phandle = <0x9>;
		};

 

I tried to create a clear project but warning 'net eth1: No interrupts asserted in Tx path' is still here.

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2 Replies
shabbirk
Moderator
Moderator
484 Views
Registered: ‎12-04-2016

Hi @crepe 

What PHY you are using? From device tree it looks like you are not using any SFP!

Are you able to see if Tx and Rx count increment in ifconfig output?

If you are using SFP for the test we have XAPP1305 as a reference

 

Best Regards

Shabbir

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crepe
Observer
Observer
476 Views
Registered: ‎03-29-2019

Hi, @shabbirk !

I am using Microchip's KSZ9031RNX. Ethernet is seems to be working, as i can use it as xilinx virtual cable in vivado with eth1's ip address. The number of TX/RX packets is increasing in 'ifconfig' as well. The block design is similar to http://www.fpgadeveloper.com/2015/12/using-axi-ethernet-subsystem-and-gmii-to-rgmii-in-a-multi-port-ethernet-design.html regarding AXI Ethernet subsystem. I don't have SFP on board so i'm not using it.

Regards,
Crepe.

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