07-17-2014 01:07 PM
I need some help -- I'm looking for a good coherent example/totorial for building a custom AXI-Lite Slave device in Verilog under Vivado.
This is destined to run on a MicroZed board from AvNet
The examples I've seen are either in VHDL or use the older EDK or other tools outside the Vivado suite.
I have a Wizard generated IP Device started -- but I don't know if I'm supposed to be writing my interface code at the top level or the next level down into the instantiated slave. (it looks like the maybe latter) where only my ports need to go through the top layer of the device.
This is why a good but simple example would be nice.
07-20-2014 09:07 AM
04-30-2019 11:20 AM