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Explorer
Explorer
4,743 Views
Registered: ‎04-01-2016

Aurora 64b/66b Lane and Channel Up

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Hello everybody,

 

I have a problem with the simulation of the Aurora 64b/66b IP Core. The problem is, that channel up and lane up are never asserted. But on the TX_P/N and RX_P/N pins there is a communication between my two DUTs (screenshot).

 

TX_RX_pins.png

 

On the next screenshot it can be seen that Lane Up and Channel Up are Zero, but the MMCM is locked as well as gt_pll_lock:

 

Lane_Channe_MMCM.png

 

I simulate my design with Modelsim and set the time resolution to fs. I simulated the whole design for 1 ms but LaneUp and ChannelUp remained Zero. :(

 

Kind regards

Sebastian

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1 Solution

Accepted Solutions
Explorer
Explorer
8,534 Views
Registered: ‎04-01-2016

Re: Aurora 64b/66b Lane and Channel Up

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@smarell

 

I think I did it. Because I was sure that I had another simulation with an Aurora 64b/66b running I compared the two projects. Then I saw I included a file named xxx_funcsim.v. I deleted this file as well as the appropriate related simulation files in the library and then it worked.

My guess is that there are the same entities in different files and the funcsim is not designed for simulation in Modelsim but was taken for simulation instead of the correct file.

 

Perhaps you can give me a note if my guess is correct.

 

Kind regards

Sebastian

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5 Replies
Explorer
Explorer
4,742 Views
Registered: ‎04-01-2016

Re: Aurora 64b/66b Lane and Channel Up

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I understand that the two DUTs try to synchronize with test sequences on TX/RX. At the beginning of simulation everything looks good. For the first 16,017,678 ps the TX/RX pins do nothing and then after sync_clock starts working the TX/RX pins start with the synchronization sequence. I don't know why I get no stable channel.

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Community Manager
Community Manager
4,729 Views
Registered: ‎07-23-2012

Re: Aurora 64b/66b Lane and Channel Up

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Simulate it for a little long and see if the link comes up. In parallel, please share your .xci file so that I can try to reproduce & investigate this at my end.
-----------------------------------------------------------------------------------------------
Please mark the post as "Accept as solution" if the information provided answers your query/resolves your issue.

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Explorer
Explorer
4,726 Views
Registered: ‎04-01-2016

Re: Aurora 64b/66b Lane and Channel Up

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@smarell

 

Thank you very much for your fast response. Of course I share my *.xci-file. :)

 

Kind regards

Sebastian

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Explorer
Explorer
4,688 Views
Registered: ‎04-01-2016

Re: Aurora 64b/66b Lane and Channel Up

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Just a small note: I checked the hierarchy and there are no black boxes. Furthermore there are no warnings while starting the simulation. So the hierarchy seems to be correct. For simplicity I post a screenshot.

 

Hierarchy.png

 

Kind regards

Sebastian

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Explorer
Explorer
8,535 Views
Registered: ‎04-01-2016

Re: Aurora 64b/66b Lane and Channel Up

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@smarell

 

I think I did it. Because I was sure that I had another simulation with an Aurora 64b/66b running I compared the two projects. Then I saw I included a file named xxx_funcsim.v. I deleted this file as well as the appropriate related simulation files in the library and then it worked.

My guess is that there are the same entities in different files and the funcsim is not designed for simulation in Modelsim but was taken for simulation instead of the correct file.

 

Perhaps you can give me a note if my guess is correct.

 

Kind regards

Sebastian

View solution in original post

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