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Participant jlaudolff
Participant
972 Views
Registered: ‎11-21-2017

Aurora example design with labtools: Hardware manager does not recognize ila and vio devices

I have an aurora example design with labtools enabled. When I program the design into a VCU118, the hardware manager recognizes 1 ILA and 3 VIO modules but I get warnings that during refresh_hw_device that the instances cannot be found. However, the devices are listed in the hardware manager pane. When I click on one of the devices, the CELL_NAME field is empty. Could this be why the hardware manager is not associating the devices with the probes file? How can this be fixed?

 

I am pretty sure the devices are in the design because they show up in the nets and leaf cells.

It also looks like the aurora links are working based on laneup, channelup, harderr and softerr signals on both ends of the link. I am just looking for some other confirmations.

 

refresh_hw_device [lindex [get_hw_devices xcvu9p_0] 0]
INFO: [Labtools 27-2302] Device xcvu9p (JTAG device index = 0) is programmed with a design that has 1 ILA core(s).
INFO: [Labtools 27-2302] Device xcvu9p (JTAG device index = 0) is programmed with a design that has 3 VIO core(s).
WARNING: [Labtools 27-3403] Dropping logic core with cellname:'vio3_inst' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3403] Dropping logic core with cellname:'vio1_inst' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3403] Dropping logic core with cellname:'i_ila' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3403] Dropping logic core with cellname:'vio2_inst' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-1974] Mismatch between the design programmed into the device xcvu9p_0 and the probes file(s) /home/jlaudolff/dbox_fb/jiml_linux_work/investigations/wintech_dev/firefly_bringup/vcu118_aur/vcu118_aur_ex2/aurora_64b66b_0_ex/junk.ltx.
The device design has 1 ILA core(s) and 3 VIO core(s). The probes file(s) have 0 ILA core(s) and 0 VIO core(s).
Resolution:
1. Reprogram device with the correct programming file and associated probes file(s) OR
2. Goto device properties and associate the correct probes file(s) with the programming file already programmed in the device.

 

 aurora.PNG

 

Thanks,

Jim

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2 Replies
Xilinx Employee
Xilinx Employee
849 Views
Registered: ‎02-06-2013

Re: Aurora example design with labtools: Hardware manager does not recognize ila and vio devices

Hi

 

Check if suggestions in below AR helps

 

https://www.xilinx.com/support/answers/58406.html

Regards,

Satish

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Adventurer
Adventurer
446 Views
Registered: ‎01-27-2008

Re: Aurora example design with labtools: Hardware manager does not recognize ila and vio devices

Just found something strange that can be associated with this error.

set_property PROBES.FILE {~/adc_debug.ltx} [get_hw_devices xczu7_0]
refresh_hw_device [get_hw_devices xczu7_0]
INFO: [Labtools 27-2302] Device xczu7 (JTAG device index = 0) is programmed with a design that has 2 ILA core(s).
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'u_ila_adc' at location 'uuid_507FFF6187E459B698B8EBFAEAD80858' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-1974] Mismatch between the design programmed into the device xczu7_0 and the probes file(s) /home/local/G3TI/jerry.olup/work/sg1300/fmcomms/hw_svn_delta/fmcomms2_zcu106/projects/fmcomms2/zcu106/adc_debug.ltx.
The device design has 2 ILA core(s) and 0 VIO core(s). 1 ILA core(s) and 0 VIO core(s) are matched in the probes file(s).

This has similar error language.

So the second ILA core was good but the first one (already used in a design) was not consistent.  My CELL_NAME field is empty - until the probes file is correct.

The issue is that the CORE_UUID changed between designs when I added the second core. Once I fixed that in my ltx file, the sequence works.

507FFF6187E459B698B8EBFAEAD80858
changed to 
6a9551338b5e5e369ba17615e34be781

So that's another case when the tool states that there are a consistent number of ILAs in the design (eliminating lack of clock).

Sorry this is so late - just came across this case.

Jerry

 

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