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PaulMichelon
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Registered: ‎05-21-2021

Auto-negotiation with 40G/50G Ethernet Subsystem (3.2)

Hi,

I'm trying to make 2 40G/50G Ethernet Subsystems communicate with auto-negotiation. Here is a schematic of the circuit in vivado :

PaulMichelon_0-1621589205140.png

 

It's two 40G/50G Ethernet Subsystems with the first connected to AXI4-Stream VIPs and the second with a loopback on the AXI4-Stream side. The two are connected with gt_rx and gt_tx.

So far I've managed to send and receive a stream WITHOUT auto-negotiation but when I enable it it doesn't work.

Here is the code I use to configure the IPs with AXI Lite :

PaulMichelon_1-1621589540690.png

 

With read_reg and write_reg reading and writing in the AXI Lite register space :

PaulMichelon_2-1621589627487.png

 

(I've set the seed value to have autone_bypass = 0 and autoneg_enable = 1)

As I have 2 AXI Lite VIPs (one for each IP), the intfce selects which one to use.

The norm I want to use is 40Gbase KR4.

I've read the clause 73 of the IEEE 802.3 but I'm not sure now how to configure the Auto-negotiation. Is there a state machine to implement in addition to the IP ? What base link codeword should I use (in an_loc_np_data) ? My attempts have been unsuccessful so far.

Thank you for your time

 

 

 

 

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15 Replies
guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

Have you ever got "an_good_check" asserted?

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

And you may try deselecting “Use Precompiled IP simulation libraries” and adding ““-d SIM_SPEED_UP” vlog option to speedup the simulation. 

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PaulMichelon
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Registered: ‎05-21-2021

Hi,

Thank you for your response.

I already use “Use Precompiled IP simulation libraries” and “-d SIM_SPEED_UP”.

I don't get "an_good_check" but i do get the two pulses "tx_disable" and "an_rxcdrhold" switches to 1 after my registers configuration.

I've noticed that there seems to be a difference in the clause 73 and the 40G/50G Ethernet Subsystem manual :

802.3 Clause 73 page 509 :

PaulMichelon_0-1621856864273.png

And we can see in page 48 of the Ethernet manual :

PaulMichelon_1-1621856960045.png

The bit 13 is Remote Fault in the first and Message Protocol bit in the second. Is it expected ?

Best regards

 

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

The 1st is for the base page coding while the 2nd is next page data (*_np_data)

In the 1st screenshot, it says that next page coding is defined in 73.7.7

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

Please make sure that 2 endpoinds have the different AN seed value.

PG211

The nonce_seed[7:0] input must be set to a unique value for
every instance of the auto-negotiator. The AN IP will not function if the nonce_seed is set
to 0. This is important in order to guarantee that no deadlocks occur at power-up. If two link
partners connected together attempt to auto-negotiate with their nonce_seed[7:0] inputs
set to the same value, the auto-negotiation fails continuously.

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PaulMichelon
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Registered: ‎05-21-2021

So where can I specify the base page in the IP ? Is it auto-generated ?

The 2 IPs have a different seed (I put 0x5 (IP 0) and 0xD (IP 1) in the CONFIGURATION_AN_CONTROL_REG1 of the IPs)

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

They're included in the IP core ports.

Which bit you can't find?

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PaulMichelon
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Registered: ‎05-21-2021

Ok I did not understand that. So the Base Page is generated with the configuration ports/registers.

Now the problem is that the configuration I gave in the first message doesn't seem to complete the auto-negotiation. Is there an error somewhere ? How much simulation time the auto-negotiation takes with SIM_SPEEDUP ? Are there signals that I can see to monitor the conduct of the AN ?

Thanks

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

1. Try to interconnect 2 Ethernet IP cores with AN enabled and the different seeds in simulation first. Can they complete AN?

2. Add all the AN related signals into the waveform and upload it to have a check.

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

I upload the doc on how I interconnect 2 10G/25G Ethernet IP in simulation to run AN. FYI

40G/50G should be similiar.

Please also upload the IP core .xci file to let us know your IP core configurations.

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PaulMichelon
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Registered: ‎05-21-2021

Hi,

I've followed the instructions in your document ANLT_example. I interconnected 2 IPs (l_ethernet_4_exdes) starting with the example design (4) with ctl_autoneg_bypass = 1, it passes the test successfully (so the connections are good).

However, when I activate autonegotiation (ctl_autoneg_bypass = 0, ctl_autoneg_enable = 1, DIFFERENT ctl_an_nonce_seed in the two IPs), I get the following waveforms and the test fails :

PaulMichelon_0-1623396765066.png

PaulMichelon_2-1623396951614.png

(these are for the first IP)

Here is the code I modified in the example design :

PaulMichelon_3-1623397160886.pngPaulMichelon_4-1623397202041.png

PaulMichelon_5-1623397258817.png

(I can't send the files itself because I use a remote connection)

Where is the issue ? I've followed each instruction in your document and it still doesn't work. I don't know why I still get X in the lane 0 of the Ethernet subsystem when I activate autonegotiation.

Best regards

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

What's the Vivado version?

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PaulMichelon
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Registered: ‎05-21-2021

Hi,

It's Vivado v2020.2.

Best regards

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guozhenp
Xilinx Employee
Xilinx Employee
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Registered: ‎05-01-2013

Deselect "Use Precompiled IP simulation libraries"?

And add "-d SIM_SPEED_UP" vlog option?

 

I just created a 40G/50G example. AN/LT can work in simulation.

Please upload your IP core .xci file.

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PaulMichelon
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Registered: ‎05-21-2021

I already use SIM_SPEED_UP and I already deselected "Use Precompiled IP simulation libraries" :

PaulMichelon_0-1623743509477.pngPaulMichelon_1-1623743529952.png

I can't send you de .xci because I use a remote, protected connection. But it's just the configuration used by the example design "l_ethernet_4" (40G with just auto-negotiation) so you should be able to find it in the example designs.

I would be interested in your 40G/50G AN/LT project, can you send it here ?

Have a good day

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