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gudurvenkatesh
Observer
Observer
3,673 Views
Registered: ‎04-14-2014

Bare metal based Ethernet on ZCU102 kit

Hello all,

In my application, I need to store a huge amount of data from FPGA. Initially, I tried using SD card. But with this approach large amount of time is taken (around hours). I need this data on a PC.

I learnt that high-speed communications like Ethernet, PCIe, etc. can be used to send a huge amount of data. 

 

I have a ZCU102 kit with me and I would like to use Ethernet to send data from the board to PC. I am using bare metal on ZCU102 kit.

 

I am in need of some tutorial or links, which are useful to learn bare metal based Ethernet on ZCU102 kit. In SDK in mss file I can see documentation and example for psu_ethernet_3. But few terms like GEM available on the Zynq Ultrascale+ is confusing with regular ethernet. Please direct me to a solution on this query.

 

Thank you in advance.

 

Regards

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8 Replies
nanz
Moderator
Moderator
3,574 Views
Registered: ‎08-25-2009

Hi @gudurvenkatesh,

 

XAPP1306 is baremetal based design targeting ZCU102. Please take a look:

http://www.wiki.xilinx.com/x3.%20XAPP1306

https://www.xilinx.com/support/documentation/application_notes/xapp1306-ps-pl-ethernet-performance-lwip.pdf

 

The design can be simply loaded to test Ethernet connections. LWIP is used as standalone application.

 

Hope this helps!

 


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gudurvenkatesh
Observer
Observer
3,542 Views
Registered: ‎04-14-2014

Thanks for your time and reply!

 

I have gone through the document and also run one of the example design, echo server. By this example, I am able to send data (same data that has been received) to the host PC.

 

After learning this, I am looking forward to sending data from FPGA to PC. While doing this, I am encountering the following points:

1. Every time I would like to send data to the same host PC (same static IP address). I would like to send data whenever FPGA wants to send (not when PC requests data)

2. I need always an established connection between PC and FPGA.

3. I have seen that most of the functions from lwip stack are usable in FPGA also. So, I can use the flows described at other web pages for transferring data to PC (http://lwip.wikia.com/wiki/Raw/TCP). I can use necessary functions and proceed to transfer data. 

 

My question is:

How can I make sure that connection is always established between PC and FPGA and send data to PC whenever I need? I am ready to assume that IP of PC is always same and can feed in FPGA program.

 

 

 

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nanz
Moderator
Moderator
3,534 Views
Registered: ‎08-25-2009

Hi @gudurvenkatesh,

 

You may check out LWIP_TCP_KEEPALIVE options if you always have a physical connection between PC and the board. If you remove the ethernet cable, and lwIP will not receive the ACK from the PC, then it will close the connection.


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Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs and our Versal Ethernet Sticky Note.

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gudurvenkatesh
Observer
Observer
3,524 Views
Registered: ‎04-14-2014

Thank you for your time and reply!

I will use this and start my design and repost if any query arises.

 

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shayneyan
Visitor
Visitor
3,037 Views
Registered: ‎08-03-2018

Hi @nanz,

 

I also try to implement the example design in XAPP1306. However, when i want to generate the bitstream, it says that "bitstream generation of tri_mode_ethernet_mac is not permitted" . Do you know how to figure it out?QQ图片20180929102947.png

 

 

Best Regards,

Shayne

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colombini_luca
Explorer
Explorer
2,995 Views
Registered: ‎11-05-2008

Hi @shayneyan,

 

  the xapp1306 uses a TriMode MAC IP which must be purchased in order to generate a bitstream.

 

Luca

shayneyan
Visitor
Visitor
2,871 Views
Registered: ‎08-03-2018

Hi @colombini_luca,

 

  Thanks for your reply. But i come out with another question: can I use GEM3, which is connected to a Ethernet module, without running any operation systems on my APU to access data and transmit data via protocol like TCP or UDP?

  

  I go through the XAPP1306 but it just roughly mentions the GEM3 in bare metal application and I am curious about how to use it under bare metal condition. 

 

Best Regards,

Shayne

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nanz
Moderator
Moderator
2,840 Views
Registered: ‎08-25-2009

Hi @shayneyan,

 

You can use GEM3 on ZVU102 directly. It is hard-wired to a TI PHY on board. You can use SDK LWIP example designs to verify the interface. This is based on baremetal.


-------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs and our Versal Ethernet Sticky Note.

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