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Adventurer
Adventurer
171 Views
Registered: ‎07-27-2018

CMAC 2019.1 Eye Diagram closed (KCU116)

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Hi everybody,

I' working on a custom design using CMAC 2019.1 on KCU116.

I have a complete simulation that woks fine with alignment and a trasmission block by an AXI HLS block.

I customized the CMAC without enabling neither RS-FEC nor AN/LT (since my application requires just 1/2 meters with OM3 fiber optics).

I inserted the in-System IBERT to debug the channel, I get the rx_alignment, but I have the Eye completely closed on all 4 serial channels!

eye_diagram_ibert.png

I tried to play with TX-PRE, POST, and DIFF but with not results, also a sweep doesn't help.

My counterpart is a Mellanox 5X, I manually set speed at 100G disabling AN. Actually I'm using fs generic 25G SFP+ transceiver on the kcu116 board.

To futher investigate the problem I tried the example design on Ibert for KCU116, in this case I used one external loopback module, I get the link up at 28Gbps with this eye diagram:

 

 

eye_diagram_loopback_ibert.png

In this configuration near loopbacks mode works instead all far loopback mode fails and link goes down.

 

Which are methods to tune the channels for this kind of application?

Why do all far loopbacks modes fail on the example design?

I'm aware that a gigabit channel needs to be tuned but in this case I'm using a Xilinx board no a custom one, with an IP (i.e. CMAC) that was supposed to insert the right constraints and parameters for gt part....

Every contribution and advise is well accepted!

Thank you in advance

 

 

 

 

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1 Solution

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Adventurer
Adventurer
104 Views
Registered: ‎07-27-2018

回复: CMAC 2019.1 Eye Diagram closed (KCU116)

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Hi guozhenp,

thank you for your reply,

Finally I get the 4 eyes opened, my experience is:

1) Customize CMAC checking "Include IEEE 802.3bj RS-FEC" option

2) Set RS FEC on Mellanox

3) power up kcu116

4) plug the mellanox side transceiver

 

In this way I get a good 4 eyes like this:

 

eye_good.png

 

 

View solution in original post

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3 Replies
Xilinx Employee
Xilinx Employee
130 Views
Registered: ‎05-01-2013

回复: CMAC 2019.1 Eye Diagram closed (KCU116)

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If you use the external loopback module and run your CMAC design with in-system IBERT, what's the result?

Is eye still closed in the case?

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Adventurer
Adventurer
105 Views
Registered: ‎07-27-2018

回复: CMAC 2019.1 Eye Diagram closed (KCU116)

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Hi guozhenp,

thank you for your reply,

Finally I get the 4 eyes opened, my experience is:

1) Customize CMAC checking "Include IEEE 802.3bj RS-FEC" option

2) Set RS FEC on Mellanox

3) power up kcu116

4) plug the mellanox side transceiver

 

In this way I get a good 4 eyes like this:

 

eye_good.png

 

 

View solution in original post

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Adventurer
Adventurer
100 Views
Registered: ‎07-27-2018

回复: CMAC 2019.1 Eye Diagram closed (KCU116)

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Beside the eye opened I'm not able to coommunicate yet.

But I thing it is related with my design , in which I didn't connect anything on the Axi Stram Rx port of the CMAC.

I compared my simulation with one made with Xilinx example design, basically the difference is about a signal called stat_rx_remote_fault,

following the simulation signals window:

 

 

remote_fault.png

 

This signal is poor documentend on pg203 simply I don't undestand what it really means, however I thing I will open a new thread for this.

Thank you

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