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Adventurer
Adventurer
322 Views
Registered: ‎07-27-2018

CMAC: CTRL_RX_PROCESS_LFI

Hello everyone,

the Integrated 100G Ethernet v3.1 CMAC IP has a parameter called CTL_RX_PROCESS_LFI.
What is the exact meaning of this parameter? When we should check it?

Thank you.

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Xilinx Employee
Xilinx Employee
243 Views
Registered: ‎05-01-2013

TRUE: If an LFI condition is detected, the core will stop receiving packets until the LFI is cleared. Packets in progress will be terminated and an error will be indicated on the LBUS. A START block must be received before packets are received again.

(LFI condition means that "Local Fault" code is received by IP core.)

FALSE: IP core does nothing. You will only see local fault state signal indicated by IP.

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Adventurer
Adventurer
215 Views
Registered: ‎07-27-2018

Hi @guozhenp ,

thank you for your reply,

in our design we use the AXI Stream interface,

you cited the error on LBUS, my question is which effect this error has on the AXI stream side.

Do we get a TREADY low when LFI is = 1 on TX channel?

 

Thank you

 

 

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Xilinx Employee
Xilinx Employee
201 Views
Registered: ‎05-01-2013

I don't think it affects TX channel as it's called "CTRL_RX_PROCESS_LFI".

You can run the IP core example design to confirm it easily.

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Adventurer
Adventurer
169 Views
Registered: ‎07-27-2018

Ok I got,

but since LFI is related to an internal local fault of CMAC core

I would like to know if the core is blocked on both side RX and TX.

On the example design I can't trigger myself an internal local fault...

 

Thank you for your time

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Xilinx Employee
Xilinx Employee
161 Views
Registered: ‎05-01-2013

Disconnect RX data, e.g. tie RXP=0 and RXN=1, the IP core should have the local fault error.

Or just don't change anything, before the link up, the IP example simulation should have some time to assert local fault at the beginning. At that time, you can check your AXI TX ready.

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