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Visitor
Visitor
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Registered: ‎05-17-2012

Can I instantiate more than one Aurora IP Core at the same Quad, on Virtex-6 ?

Hello,

I need to communicate one Virtex-6 with 3 others Virtex-6. I created 3 Aurora IP Cores on the Virtex-6 that will be communicating with the three others :

 

  • Simplex TX - 1 Lane.
  • Simplex TX - 1 Lane.
  • Simples RX - 2 Lanes.

I want to constraint the configuration in one Quad.

Im wondering if this can be a problem, because each Quad has just one reference clock, and the IPs require one reference clock each. The Reference clock will be the same for all IPs - 156.250 MHz..

It will be a problem?

 

FPGA: XC6VLX240T-1FF1156

ISE 13.4 (nt64)

IP: Aurora 8B/10B 5.3

 

Thanks,

Iliézer Tamagno

 

 

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Visitor
Visitor
4,436 Views
Registered: ‎05-17-2012

If you just tell me if is possible to instantiate 2 Aurora 8b/10b 5.3 to communicate with two other Virtex-6, I'll appreciate.

 

Thanks!

Iliézer Tamagno

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