Can i by using loopback="010" receive my transmitted data using a 1lane auora core?

[jeevanreddymandali]

Hello guys, I am trying to send some data from counter to aurora through a fifo and making loopback "010" and trying to receive the transmitted data. Transmission is going well but cannot receive data. I guess both tx and rx cannot be done on a single lane. What dou you guys say? Please suggest me like to use 2 lanes or something.

Regards

[vsrunga]

Hi,

Which device is this ?

Provide more info like where you want to loop back,  is it near-end PCS or PMA,  Core settings, PPL locking/not etc.,

Also try google serach for related issues to check if  you find something related and helpful

http://forums.xilinx.com/t5/Connectivity/Anybody-succeed-in-loopback-of-Spartan-6-aurora-core/td-p/77599

http://forums.xilinx.com/t5/Connectivity/loopback-in-Aurora-3-0-simplex-both/td-p/45416

http://forums.xilinx.com/t5/Connectivity/loopback-test-of-virtex5-aurora-core/td-p/95830

Regards,

Vanitha.

[jeevanreddymandali]

Hello,thanks for your time, but as i am an absolute newbie it didnot help me a lot. The link you gave me was telling VIO port mapping reversed(for sync_in_i). I couldnot understand what it means and I donot know there is a thing called end-pcs, end-pma. Please take time to explain those trems. I am using virtex-5 fpga, XC5VFX100T device, speedgrade = -1.

Regards,

[vsrunga · Accepted solution]

Hi,

I would suggest you to go through below UG & DS to have full understanding of the terminlogy and tthe core behavior

http://www.xilinx.com/support/documentation/user_guides/ug196.pdf

http://www.xilinx.com/support/documentation/ip_documentation/aurora_8b10b_ds637.pdf

http://www.xilinx.com/support/documentation/ip_documentation/aurora_64b66b/v4_2/aurora_64b66b_ug237.pdf

Regards,

Vanitha.

[jeevanreddymandali]

Okay I will. Thanks a lot for your effort!
Regards,