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Observer
Observer
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Registered: ‎08-04-2017

Communication Between multiple FPGAs

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Hi,

I am working on a multi-FPGA design. For now i am using two virtex-7 vc707 FPGA boards, i think i can make use of GTX transceiver with Aurora logicore in my design to get a speed upto 6.6 Gbps with single lane. Can you please suggest me all the other ways and protocols for communication between FPGAs ? A link to some study material or pdf will suffice.

 

Thanks,

Chinmay

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008
You can use Chip2chip IP or Aurora

AXI Chip2Chip
The AXI Chip2Chip is a soft Xilinx IP core for use with the Xilinx Embedded
Development Kit (EDK). ... AXI Chip2Chip. Overview; Documentation. ...


09/10/2015
XAPP1160 - AXI Chip2Chip Reference Design for Real-Time Video Application ( ver3.0, 988 KB ) [PDF]
This application note demonstrates the use of the AXI Chip2Chip IP core in bridging AXI systems on multiple devices using an FMC connector cable. This setup demonstrates the AXI Chip2Chip core handling real-time video traffic across two Xilinx FPGA boards (Kintex®-7 FPGA and Zynq®-7000 AP SoC).
Design File(s)
xapp1160.zip

07/03/2014
PG067 - AXI Chip2Chip v4.2 Product Guide ( ver4.2, 915 KB ) [PDF]
The AXI Chip2Chip core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high-performance AXI chip-to-chip bridging solution.

Thanks and Regards
Balkrishan
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Contributor
Contributor
3,064 Views
Registered: ‎09-08-2015

@chinmay512

Hi,

 

FPGA to FPGA communication is tightly depends to your board design and how FPGAs can communicate. Also, it is important to know which data rate you need to transfer data between FPGAs. In general, For serial link solution you can use QSPI IP which can be used simply as both master and slave device but of course is low data rate. Aurora is a relatively easy IP to use which you can use for high data rate communication compliant with AXI Stream. Maybe it is a bit weird but you can also use QSGMII using Transceivers to communicate but needs to handle the XGMII or GMII interface on user side.

 

Kind regards,

Pedram Kermani

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Xilinx Employee
Xilinx Employee
3,904 Views
Registered: ‎08-01-2008
You can use Chip2chip IP or Aurora

AXI Chip2Chip
The AXI Chip2Chip is a soft Xilinx IP core for use with the Xilinx Embedded
Development Kit (EDK). ... AXI Chip2Chip. Overview; Documentation. ...


09/10/2015
XAPP1160 - AXI Chip2Chip Reference Design for Real-Time Video Application ( ver3.0, 988 KB ) [PDF]
This application note demonstrates the use of the AXI Chip2Chip IP core in bridging AXI systems on multiple devices using an FMC connector cable. This setup demonstrates the AXI Chip2Chip core handling real-time video traffic across two Xilinx FPGA boards (Kintex®-7 FPGA and Zynq®-7000 AP SoC).
Design File(s)
xapp1160.zip

07/03/2014
PG067 - AXI Chip2Chip v4.2 Product Guide ( ver4.2, 915 KB ) [PDF]
The AXI Chip2Chip core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high-performance AXI chip-to-chip bridging solution.

Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
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Observer
Observer
2,924 Views
Registered: ‎08-04-2017

Hi,

 

Thanks @pd.kermani and @balkris for your kind attention and sorry for this additional thread. Can you tell me something about parallel communication between FPGA boards.

 

Chinmay

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Contributor
Contributor
2,893 Views
Registered: ‎09-08-2015

@chinmay512

 

You can use chip2chip IP without Aurora, then you need to configure the IP on SDR or DDR mode. Following this document PG067 - AXI Chip2Chip v4.2 Product Guide you can find parallel bus communication application on page 8 and for more detailed diagram check page 18.

 

Kind regards,

Pedram Kermani

 

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