05-30-2014 01:09 PM
06-02-2014 11:32 PM
06-05-2014 05:18 AM
When you are connecting the two boards with 10g based core , you need not provide the clock from one board to another.
Both boards will have the referance clock and the ppm difference will be handled by the GT blocks internally.
Regarding the local fault,
If you have checked the points in debugging section of the product guide pg068 , can you put details of the observations ?
07-17-2014 05:29 AM
I have checked the product guide but I didn't manage to make this connection work. I have two boards VC707 and VC709, I use the pcs/pma and mac that are connected as it is done on the AXI 10G (but whitout the IEEE 1588). First, I programmed the VC707 it's transmitting 0200009C0200009C and sending as the picture attached. Then I program the VC709 and I have the same thing, at this time the VC707 transmit idle(0707070707070707) but receives as the picture but its 0200009C instead of 0100009C. The VC709 never goes to idle it stays on its intial state. If we choose to bypass in the register of the mac of VC709 and sent idle without taking care of the reception than the VC707 is fully on idle state and if we make some data exchange from VC709 to VC707 it is working. But not in the other way as it always receives the same (the signal in the picture). Do you have an idea of the problem ?