Hello,
I have an application that may require I create a daisy chain of boards using high speed serial transcivers. I want the overall system delay (from data generation to collection at the end of the chain) to be as low as possible, which probably means sending very small chunks of data.
Some my questions are:
-Is there a recomended approach for something like this?
-Do transcivers require a TX/RX pair to be connected between devices in order function properly or can the TX and RX of a transciver be connected to transcievers of different boards/FPGAs? I assume this is a complicated answer as it probably depends on the protocol, speed, the need for error correction, etc. A similar question was asked here, but it seemed a bit specific to a protocol.
-Is there a direct path from the RX to the TX between two different transievers on the same FPGA which would allow the FPGA to be bypassed while a unit was just forwarding data?
