03-12-2014 12:47 AM
Currently I’m working on a design for VC709 board where I want to have two sets of a "Ethernet 1000BASE-X PCS/PMA or SGMII" and "Tri Mode Ethernet Mac" combo connected to SFP/SFP+ cages on the board. The idea is to configure the Xilinx IP cores for 1000BASE-T over twisted copper. The modules are configured like
The Ethernet 1000BASE-X PCS/PMA or SGMII module:
- SGMII mode
- Device Specific Transceivers
- MAC mode, SGMII PHY mode not enabled. (On advice from Xilinx since the SFP should contain a PHY inside.)
The Tri Mode Ethernet Mac Core:
- PHY Interface Internal (as described in pg047 page 250)
- Tri speed
- AXI4-lite configuration interface.
While trying to get a proper medium link I discovered the SGMII Extended status register (register 15) on page 108 of PG047 manual. This register describes the supported configurations. From the manual it seems that 1000BASE-T Full Duplex is not supported. Reading back this register from the FPGA returns the default value mentioned in the documentation (only support for 1000BASE-X Full Duplex).
Maybe I missed it, but I could not find any other reference to the supported configurations in this document than only this register.
Can someone provide me more information about this register and the supported configurations?
03-12-2014 03:11 PM - edited 03-12-2014 03:12 PM
The core supports:
1) 1000BASE-X to connect to Optical SFP which will connect to fiber optics.
2) SGMII to connect to external PHY which will connect to copper wires operating in 1000BASE-T mode.
1000BASE-T not supported means that you need an external PHY to connect to COPPER.
03-13-2014 12:09 AM
Thanks for your feedback.
I’m using a SFP transceiver that contains the external PHY to connect to copper.
03-13-2014 11:13 AM
I don't know which SFP you are using but I would assume that it expects 1000BASE-X from the FPGA.
Here's an interesting application note from Finisar
03-14-2014 01:33 AM
Thanks for your feedback. I will to read the attached article to get more information.
Currently I’m using a couple of Agilent HBCU-5710R 1000Base-T SFP transceivers that we used successfully on our ML605 boards.
03-14-2014 08:49 AM
When reading back you statement I’m not sure what you mean with:
“I don't know which SFP you are using but I would assume that it expects 1000BASE-X from the FPGA”
Please, can you provide me some more details. My previous reply describes the SFP transceiver that I try to use.
03-14-2014 09:34 AM
Sorry I meant SGMII.
To clarify, you can connect the GT to the SFP/PHY in SGMII mode. You cannot connect the GT directly to the RJ45 connector.
03-17-2014 01:37 PM
03-17-2014 03:54 PM
By GT I mean the FPGA GTX or GTP.
I don't have much experience with 1000BASE-T auto-negotiation. My guess is that if you disabled auto-negotiation on the SGMII side, you also need to disable it at you link partner. I would look into the Finisar Application Note starting answer 9.
07-17-2017 05:56 AM
Did you find any solution to bring up the link on SGMII interface? I have the same issue and could not resolve the auto-nego between PHY and 1G PCS/PMA IP interface.