Gigabit Ethernet via two SGMII cores and EMIO on Zynq
Anyone have success implementing two SGMII cores in hardware? I've followed XAPP1082 and PG047 as a guide. We've tried with Auto-Negotiation enabled and disabled. We verified that status_vector and  are asserted, but can't communicate with MDIO or perform ping operations between the link partner.
As far as connecting the two cores, is it a matter of following Table 3-1?