Is it possible to use Zybo's ethernet on PL through EMIO?

[ubenevides]

Hello folks,

I am trying to use Zybo's ethernet in the PL side directly - I believe it is possible to redirect through EMIO? 

Are there designs available? I could not find anything. 

Any suggestions are welcome.

Thank you.

[hpoetzl]

Hey @ubenevides,

The 7Series Zynq FPGAs all feature two gigabit ethernet controller peripherials which can be mapped to EMIO, so you can definitely do that. The problem is more that you need the physical layer stuff as well, which is usually not available on most development boards.

There is a wiki entry regarding PL Ethernet on the Zynq which should provide some useful information.

Hope this helps,

Herbert

[muzaffer · Accepted solution]

@ubenevides In zynq you can connect PS controllers (under some condition) to PL IOs. Is this what you want? If you want to access ethernet functionality from the PL side,  the only "direct" way is to generate AHB transactions and talk to the ethernet controller to duplicate the behavior of a software driver by a PL AHB master. There is no other direct interface.

[ubenevides]

@hpoetzl It's actually the opposite. I want to bypass the PS and handle the Zybo's gigabit ethernet in PL. But I think I misunderstood what EMIO is for. I see EMIO is actually a master to link to external ethernet lines, not a way to bypass the PS as I was thinking.

@muzaffer I understand this now. I guess for now I will just handle the ethernet flow in PS and push it to the PL through an AXI Fifo or similar. 

Thanks all

[hpoetzl]

You're welcome!

I see EMIO is actually a master to link to external ethernet lines, not a way to bypass the PS as I was thinking.

Yep, there is no way to bypass the PS and 'hijack' PS peripherials that way.

What you still can do is use the PS peripherials from PL without involving the ARM cores via AXI.

But handling ethernet in PS and sending packets to PL is usually simpler.

Best,

Herbert

[narendiran1996]

Can you give me some resource for doing AHB transactions to talk with ethernet controller??

[muzaffer]

ethernet controller is just a set of registers sitting at a certain offset. Figure out which port on the PL-PS interface has access to that address region and generate access through an axi initiator (master in the old parlance). This seems to be a good source to read: http://igorfreire.com.br/understanding-gigabit-ethernet-controllers-dma-zynq-devices/

[Sthornington2]

I did end up running the bare metal Ethernet code on a core and then just directing all the DMAs into a FIFO. If I were to try and replicate all the bring-up in PL, my question is - how do I redirect the DMA-complete interrupt into PL? Would it be possible to run the entire loop in PL and have both arm cores entirely unused? (And even better, is there an example of the PS GEM bring-up in PL?)

[Sthornington2]

(I need the DMA-complete to know when to read the packet length register in the BD, since that seems to be the only way to know the true size of the packets. The DMA bursts don’t have TKEEP properly set.)