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10,668 Views
Registered: ‎11-05-2014

Issues setting up TEMAC on ZC706

I'm having some issues setting up the TEMAC example design on ZC706 with the 1000 Base-X PCS/PMA. Here's how they're hooked together in my Top file. The rest of the Top file contains code to setup the Zynq PS and the gtrefclk signals are being generated correctly by the clock generator.

 


gig_ethernet_pcs_pma_0 pcs_pma_0 (
// Transceiver Interface
//----------------------


.gtrefclk_p(gtrefclk_p), // 125 MHz differential clock
.gtrefclk_n(gtrefclk_n), // 125 MHz differential clock
.gtrefclk_out(gtrefclk), // Very high quality 125MHz clock for GT transceiver.

.txp(sfp_txp), // Differential +ve of serial transmission from PMA to PMD.
.txn(sfp_txn), // Differential -ve of serial transmission from PMA to PMD.
.rxp(sfp_rxp), // Differential +ve for serial reception from PMD to PMA.
.rxn(sfp_rxn), // Differential -ve for serial reception from PMD to PMA.
.resetdone(GPIO_LED_0), // The GT transceiver has completed its reset cycle
.userclk_out(), // 125MHz global clock.
.userclk2_out(userclk2), // 125MHz global clock.
.rxuserclk_out(), // 125MHz global clock.
.rxuserclk2_out(), // 125MHz global clock.
.independent_clock_bufg(independent_clock),// 200MHz Independent clock,
.pma_reset_out(), // transceiver PMA reset signal
.mmcm_locked_out(), // MMCM Locked
// GMII Interface
//---------------
.gmii_txd(gmii_txd), // Transmit data from client MAC.
.gmii_tx_en(gmii_tx_en), // Transmit control signal from client MAC.
.gmii_tx_er(gmii_tx_er), // Transmit control signal from client MAC.
.gmii_rxd(gmii_rxd), // Received Data to client MAC.
.gmii_rx_dv(gmii_rx_dv), // Received control signal to client MAC.
.gmii_rx_er(gmii_rx_er), // Received control signal to client MAC.
.gmii_isolate(), // Tristate control to electrically isolate GMII.

// Management: MDIO Interface
//---------------------------

.mdc(mdc), // Management Data Clock
.mdio_i(mdio_i), // Management Data In
.mdio_o(mdio_o), // Management Data Out
.mdio_t(), // Management Data Tristate TODO
.configuration_vector(5'b0), // Alternative to MDIO interface.
.configuration_valid(1'b0), // Validation signal for Config vector 

.an_interrupt(), // Interrupt to processor to signal that Auto-Negotiation has completed
.an_adv_config_vector(16'b0), // Alternate interface to program REG4 (AN ADV)
.an_adv_config_val(1'b0), // Validation signal for AN ADV
.an_restart_config(1'b0), // Alternate signal to modify AN restart bit in REG0

// General IO's
//-------------
.status_vector(), // 16 bit out Core status.
.reset(!FCLK_RESET0_N), // Asynchronous reset for entire core

.signal_detect(1'b1), // Input from PMD to indicate presence of optical input.
.gt0_qplloutclk_out(),
.gt0_qplloutrefclk_out()
);


tri_mode_ethernet_mac_0_example_design temac0
(
// asynchronous reset
.glbl_rst(!FCLK_RESET0_N),

// clock from internal phy
.gtx_clk(userclk2),


.speedis100(), // output
.speedis10100(), // output

// GMII Interface
//---------------

.gmii_txd(gmii_txd),
.gmii_tx_en(gmii_tx_en),
.gmii_tx_er(gmii_tx_er),
.gmii_rxd(gmii_rxd),
.gmii_rx_dv(gmii_rx_dv),
.gmii_rx_er(gmii_rx_er),

// MDIO Interface
//---------------

.mdio_i(mdio_o),
.mdio_o(mdio_i),
.mdio_t(),
.mdc(mdc),

// Serialised statistics vectors
//------------------------------
.tx_statistics_s(tx_stats), // out
.rx_statistics_s(rx_stats), // out

// Serialised Pause interface controls
//------------------------------------
.pause_req_s(1'b0), 

 

// Main example design controls
//-----------------------------
.mac_speed(2'b10), // 1Gbps
.update_speed(SW_BUTTON_LEFT), 
//input serial_command, // tied to pause_req_s
.config_board(SW_BUTTON_RIGHT), 
.serial_response(),
.gen_tx_data(GPIO_DIP_SW1),
.chk_tx_data(GPIO_DIP_SW2),
.reset_error(GPIO_DIP_SW0),
.frame_error(),
.frame_errorn(),
.activity_flash(unused_led_1),
.activity_flashn()

);

I've essentially taken the TEMAC example design and then added in the 1000 Base-X PCS/PMA. I see that the 125Mhz input clock is working (by connecting it to an LED) but I see nothing in Wireshark. Is there something that's obviously hooked up incorrectly?

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9 Replies
Xilinx Employee
Xilinx Employee
10,632 Views
Registered: ‎02-06-2013

Re: Issues setting up TEMAC on ZC706

Hi

 

First check if the link is up by monitering the status vector,if not check the reasons for link up failure in PG047 debugging section.

 

Also check if  loopback mode the design is working fine?

 

If the core other clocks and resets are fine?

Regards,

Satish

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10,621 Views
Registered: ‎11-05-2014

Re: Issues setting up TEMAC on ZC706

I do get link status up, but it seems to be stuck in "pause".

Is there a sample design/guide to setting up the SFP on zc706 somewhere?
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Xilinx Employee
Xilinx Employee
10,608 Views
Registered: ‎02-06-2013

Re: Issues setting up TEMAC on ZC706

 

Hi

 

You can find the core configuration and setup details in PG047 and the example design delivered with the core.

 

Can you attach the captures of status vector and data signals at the transceiver interface and gmii interface for further debug.

Regards,

Satish

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10,601 Views
Registered: ‎11-05-2014

Re: Issues setting up TEMAC on ZC706

Thanks for your response Satish.

Here is a capture with those signals:
http://oi58.tinypic.com/27ybv3t.jpg
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10,597 Views
Registered: ‎11-05-2014

Re: Issues setting up TEMAC on ZC706

Just to note, this is with the TEMAC example design set to transmit generated packets.

I've set the destination address to broadcast and made up a MAC address for the board. If everything is working correctly, I should see the sent packets in Wireshark, correct?
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10,588 Views
Registered: ‎11-05-2014

Re: Issues setting up TEMAC on ZC706

One more question, by default, does the controller for the TEMAC example design "know" how to configure the pcs/pma over MDIO?
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Xilinx Employee
Xilinx Employee
10,558 Views
Registered: ‎02-06-2013

Re: Issues setting up TEMAC on ZC706

Hi

 

 

Yes,there is statemachine to control the MDIO in the axi_lite_sm file in temac example design which you can use to set the

MDIO register values.

 

If you are using AN then it will automatically to the negotiation.

 

What is the status of loopback test,is it able to see the data in this case?

Regards,

Satish

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10,542 Views
Registered: ‎11-05-2014

Re: Issues setting up TEMAC on ZC706

Unfortunately, the loopback test doesn't work either. In fact I haven't seen a single valid occur on the gmii_rxd signal.

 

When configuring the PCS/PMA in the gui, what exactly does the "USE BOARD FLOW" option do? So far I've been setting it to ETHERNET: sfp and DIFFCLK: jit att mgt clk. Does this sound right?

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Xilinx Employee
Xilinx Employee
10,529 Views
Registered: ‎02-06-2013

Re: Issues setting up TEMAC on ZC706

 

Hi

 

The "USE BOARD FLOW" option will assign the board pinout automatically for the core taking your selected options.

 

Are you able to see data at GMII_TX and at the transceiver tx parallel input when in loopback.

 

Is the link up and which version of core  you are using?

 

which loopback are you testing,Is it cable loopback or core level loopback?

 

Is the clock input to the core correct,have you programmed the silas oscillators for 125Mhz.

 

 

 

 

Regards,

Satish

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