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Visitor
Visitor
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Registered: ‎06-11-2018

Mutilple Aurora 64b/66b problem

I want to communicate between 2 KC705 and a VCU118 Board using a QSFP to 4 SFP Cable, with Aruora 64b/66b ip core.

The VCU118 project have 2 Aurora 64b/66b ip cores, 1 with shared logic in the core as master mode and 1 with in  example design as slave mode, they were connected same as the ip document(PG074) shows.

Then I use a vio core in KC705 to monitor link status.

 

Sometimes it works good ,after downloading the bit, channel_up goes high and the data transfers perfectly.

But sometimes after I download the bit, the KC705 attatched to the MASTER mode Aurora 64b/66b in the VCU118's channel_up goes high, while the KC705 attatched to the SLAVE mode 's channel_up goes to unstable status ,shown blow with pic. 

vio.jpg
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Xilinx Employee
Xilinx Employee
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Registered: ‎03-30-2016

Hello @zhu19940520

 

XF_1015_AURORA.png

  1. Are those Aurora 64B/66B IP Duplex or Simplex IP ?
  2. I suspected it is reset sequence timing problem.

    (a) Could you try to power on VCU118 board first , before powering up KC705 (B) ?
    (b) Did you try to re-initialize KC705 (B) ? Is the issue still persist ?

 

3. When you saw this issue , is the lane_up also low ? are you seeing hard_err=1, soft_err=1 ?

 

Thanks
Leo

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Visitor
Visitor
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Registered: ‎06-11-2018

After reducing lane speed to 6.25Gbps ,  the problem is *almost solved

(When power on VCU118 first, both KC705 always initialize sucessfully. But powering on KC705(B) first sometimes still goes to the problem.)

 

1 They are both duplex IPs.

2 Powering on VCU118 first will bing a higher success rate, but also fail sometimes.

I've tried to re-initialize all the boards ,but it didn't work;

3 Hard_err asserted. But I didn't monitor lane_up and soft_err. 

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Xilinx Employee
Xilinx Employee
720 Views
Registered: ‎03-30-2016

Hello @zhu19940520

So, reducing the line rate helps.....

 

  1. Could you please see if lane_up=0 in 7-series Aurora IP?
  2. Aurora 64B66B for 7-series has DFE as a default EQ setting.
    Which is may not suitable for channel with low insertion-loss. ( You are using optical module, with very close distance to the Kintex-7 FPGA). For 7-series Aurora IP, Could you modify the EQ setting to LPM ?

 

Thanks & regards

Leo

1101_zhu_aurora_64b66b.png