No rx_clk_out/tx_clk_out from 10/25G subsystem

[ubenevides]

I am using xapp1305 as a base to get 10G interfaces working on a ZCU102. I basically took the original design and removed the DMA, placing an online processor in its place. On the software side, I am running standalone. The GT reference clock is generated by the SI clock generator using the patch provided (for Linux). 

I can see the GT ref clock being active (I can see the led/counter blinking).  However the led/counter for RX and TX do not show up. 

I connect the SFP cable to another box with a solarflare card and I can see the link is established. 

The diagram is exactly the one below. I am not sure where I am goofing. Is there any further SDK initialization necessary for the 10/25G interface?

Thanks a bunch!

[jbeckwi · Accepted solution]

Hi, I see you have not connected TXOUTCLKSEL and RXOUTCLKSEL.  You will need to wire these to 3'b101

[ubenevides]

@jbeckwi Oh man you are right. Plugging in a "5" with a constant instantly brought those leds in. What a life saver. I owe you this one. Thank you so much!

What does 3'b101 mean? Is that a concatenation of txpllclksel_in, txsysclksel_in and something else? I went back to PG210 to look for it but it is nowhere to be found. 

I also followed exactly what XAPP1305 specifies and it ended up disconnected. The only change I did was to add "-es2" to the board part so it runs on my board. 

Thanks again!

[thaus_015]

Hi,
Same design i am trying for my project work. For my reference, can you share your HLS code. I want to know how the design is working. Please guide me.