04-09-2021 01:34 AM
04-12-2021 02:37 AM
04-12-2021 04:22 AM
Thanks. As far as I understand those functions are for configuring bits distribution between different fields like DU_port_id, BandSector, CC_id, RU_port_ID.
And, what is missing for me is mapping from eAxCid to RU endpoint (DL datapath). But, it looks like the ORAN IF IP is not the one to configure this mapping (?). And, there probably should be some way (another FPGA IP ?) to tell which eAxC should reach which endpoint.
04-12-2021 04:44 AM - edited 04-12-2021 04:45 AM
You are correct, xorif_set_fhi_eaxc_id is for bit distribution
For example, if you have eAxC ID as below :
To configure ORAN IP, you need to use following commands to match the settings from DU :
Then you can use xorif_set_ru_ports to decide the final ID. It depends on the Stream Identifying mask and other mask bits.
For example, if you use xorif_set_ru_ports (8, 5, 0xC0, 0, 0x80, 0x40), the value 0xC0 needs to be ANDed with other masked bits.
The PRACH mask is 0x80, so the ID is 0xC0 AND 0x80 = 1000 0000 (Binary).[7:6] 10(binary)=2 (DEC), which is the final RU_Port_ID
If you set PRACH mask to 0xC0,and then the ANDed value is 1100 0000, [7:6] is 11(binary)=3 (DEC), so the final RU_Port_ID is 3.