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Explorer
Explorer
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Registered: ‎08-04-2016

PL 1G/10G ethernet device tree entry

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Hello,

 

I am trying to add 1G/10G ethernet to ZCU102 connected to the SFP ports. The IP core is configured in 1000BASE-X mode. According to https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/net/xilinx_axienet.txt#L24, the device tree entry should look like -

 

axi_eth_0_dma: dma@A0001000 {
			#dma-cells = <1>;
			compatible = "xlnx,eth-dma";
			reg = <0x0 0xA0001000 0x1000>;
	};

axi_eth_0: ethernet@A0000000 {
		axistream-connected = <&axi_eth_0_dma>;
		compatible = "xlnx,axi-ethernet-1.00.a";
		device_type = "network";
		interrupt-names = "interrupt";
		interrupt-parent = <&gic>;
		interrupts = <0 91 4>;
		phy-mode = "sgmii";
		reg = <0x0 0xA0000000 0x1000>;
		xlnx,include-dre ;

		xlnx,phy-type = <0x5>;
		phy-handle = <&phy2>;
		axi_eth_0_mdio: mdio {
			#address-cells = <1>;
			#size-cells = <0>;
			phy2: phy@2 {
				device_type = "ethernet-phy";
				reg = <2>;
			};
		};
};

I am having trouble with the phy/mdio setting. What does each of the entries in the phy/mdio part of the device tree mean? What should I modify it to for SFP?

 

I checked both XAPP1305 and XAPP1082 but couldn't find the device tree entry in them.

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Explorer
Explorer
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Registered: ‎08-04-2016

I dug into the axienet driver source and found that the MDIO error is due to wrong configuration of clocks in the IP. I then checked xapp1305 and found that refclk should be 156.26 MHz. After this change was made, the 1G ethernet IP gets enumerated as eth1.

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Explorer
Explorer
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Registered: ‎08-04-2016

I used HSI to generate the device tree entry for my design.

 

amba_pl: amba_pl@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		ranges ;
		axi_ethernet_0: ethernet@a0000000 {
			axistream-connected = <&axi_ethernet_0_dma>;
			axistream-control-connected = <&axi_ethernet_0_dma>;
			clock-frequency = <100000000>;
			compatible = "xlnx,axi-ethernet-1.00.a";
			device_type = "network";
			interrupt-names = "interrupt";
			interrupt-parent = <&gic>;
			interrupts = <0 89 4>;
			phy-handle = <&phy1>;
			phy-mode = "sgmii";
			reg = <0x0 0xa0000000 0x0 0x40000>;
			xlnx = <0x0>;
			xlnx,axiliteclkrate = <0x0>;
			xlnx,axisclkrate = <0x0>;
			xlnx,clockselection = <0x0>;
			xlnx,enableasyncsgmii = <0x0>;
			xlnx,gt-type = <0x0>;
			xlnx,gtinex = <0x0>;
			xlnx,gtlocation = <0x0>;
			xlnx,gtrefclksrc=<0x0>;
			xlnx,include-dre ;
			xlnx,instantiatebitslice0 = <0x0>;
			xlnx,phy-type = <0x5>;
			xlnx,phyaddr = <0x1>;
			xlnx,rable = <0x0>;
			xlnx,rxcsum = <0x0>;
			xlnx,rxlane0-placement = <0x0>;
			xlnx,rxlane1-placement = <0x0>;
			xlnx,rxmem = <0x1000>;
			xlnx,rxnibblebitslice0used = <0x0>;
			xlnx,tx-in-upper-nibble = <0x1>;
			xlnx,txcsum = <0x0>;
			xlnx,txlane0-placement = <0x0>;
			xlnx,txlane1-placement = <0x0>;
			axi_ethernet_0_mdio: mdio {
				#address-cells = <1>;
				#size-cells = <0>;
				phy1: phy@1 {
					device_type = "ethernet-phy";
					reg = <1>;
				};
			};
		};
		axi_ethernet_0_dma: dma@a0040000 {
			#dma-cells = <1>;
			axistream-connected = <&axi_ethernet_0>;
			axistream-control-connected = <&axi_ethernet_0>;
			clock-names = "s_axi_lite_aclk";
			clocks = <&clk 71>;
			compatible = "xlnx,axi-dma-1.00.a";//eth-dma";
			interrupt-names = "mm2s_introut", "s2mm_introut";
			interrupt-parent = <&gic>;
			interrupts = <0 91 4 0 90 4>;
			reg = <0x0 0xa0040000 0x0 0x20000>;
			xlnx,include-dre ;
		};
	};

My hardware design is based entirely on XAPP1082.

 

During bootup, I get the following error message:

[    2.193099] xilinx_axienet a0000000.ethernet: TX_CSUM 0                      
[    2.198133] xilinx_axienet a0000000.ethernet: RX_CSUM 0                      
[    2.203538] libphy: Xilinx Axi Ethernet MDIO: probed                         
[    2.208422] xilinx_axienet a0000000.ethernet: error registering MDIO bus

What could be the problem?

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Moderator
Moderator
1,778 Views
Registered: ‎08-25-2009

Hi @rajatrao,

 

here is an example you may refer to:

 

&axi_ethernet_0{

                phy-handle = <&phy1>;

                xlnx,phy-type = <0x5>;

                xlnx,phyaddr = <0x2>;

                axi_ethernet_0_mdio: mdio {

                                #address-cells = <1>;

                                #size-cells = <0>;

                     

                                phy: phy@2{

                                                compatible = "Xilinx PCS/PMA PHY";

                                                device_type = "ethernet-phy";

xlnx,phy-type = <5>;

                                                reg = <2>;

                                };

 

                };

};

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Explorer
Explorer
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Registered: ‎08-04-2016

I dug into the axienet driver source and found that the MDIO error is due to wrong configuration of clocks in the IP. I then checked xapp1305 and found that refclk should be 156.26 MHz. After this change was made, the 1G ethernet IP gets enumerated as eth1.

View solution in original post

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