Hi all,
I want to have a point to point connection by rj-45 Ethernet between a htg-v5-pcie2 fx100t board and a pc for this I do:
1-I create a Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v1.8 core in Ise 13.2
2 - i create a project and add this files to it (form xst.prj file):
verilog work ../example_design/V5EmbTriModeEthMACCore.v
verilog work ../example_design/physical/gmii_if.v
verilog work ../example_design/physical/emac0_fcs_blk_mii.v
verilog work ../example_design/V5EmbTriModeEthMACCore_block.v
verilog work ../example_design/client/fifo/tx_client_fifo_8.v
verilog work ../example_design/client/fifo/rx_client_fifo_8.v
verilog work ../example_design/client/fifo/eth_fifo_8.v
verilog work ../example_design/V5EmbTriModeEthMACCore_locallink.v
verilog work ../example_design/client/address_swap_module_8.v
verilog work ../example_design/V5EmbTriModeEthMACCore_example_design.v
3-and add V5EmbTriModeEthMACCore_example_design.ucf to this project and chanche this:
#CONFIG PART = xc5vfx70tff1136-1; ==> I comment this
CONFIG PART = XC5VFX100T-FF1136-2;==>and add this
4- synthesis and Implement Design and generate bit stream and load *.mcs to board
5- connect Rj-45 in htg board to computer by cable
6-Ethernet LED in htg board is all off
7-jp1 & jp2 is off
8-How can I test my project?
9-is my project correct and can i test it?
thanks,
armando.
