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vishal_bits
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Registered: ‎08-06-2018

RAM size in TCAM IP as per XAPP1151

Hi,

We are planning to use TCAM IP  with depth (n) = 512 and width (m) =64  as per attached app note XAPP1151.

1. As per RAM based implemenataion section on Page 9:

   A CAM with width=m and depth=n  requires a RAM which is 2^m deep and  m-bits wide.

   If we apply this relation , the CAM uses RAM which is 2^64 words deep and 512 bits wide, which is a such huge number and hence can't be realized in FPGAs.

   Can you please help whether there is some catch in this relation ?

 

2. Can we use this CAM IP with BRAM implementation in ternary mode?

 

Thanks

Vishal

 

 

 

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