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desjardin
Visitor
Visitor
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Registered: ‎02-03-2021

Radio over ethernet 2020.2

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I am trying to use the radio over ethernet IP on zcu102 rev1.1.

i follow the rules to create the image from this url (arguments=om0 and zcu102):

https://github.com/Xilinx/wireless-apps/blob/b2020.2/scripts/README.md

The board remains blocked on the auto negotiation phase.

Consequently, i use u-boot to load the image from the sd card.

fatload mmc 0 0x2000000 image.ub

bootm 0x2000000

I get this error:

desjardin_0-1614337405370.png

 

 

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xud
Xilinx Employee
Xilinx Employee
286 Views
Registered: ‎08-02-2007

@desjardin 

axiethernet driver issues dma reset and poll for its completion. If completion doesn’t happen it errors out.

DMA tx and rx reset are tied to xxvethernet reset circuits and dependent on it for completion.

Firstly please try increasing the current delay of 1msec in driver, and then see if it helps.

If not, it might be related to a known issue in RoE example, which will be fixed in next release. 

In the initial release of RoE project, Ethernet IP doesn't have QPLL reset port. After RoE example upgraded to the later version, the QPLL reset is not connected.

The QPLL reset is only toggled at configuration or if QPLL reset port is toggled. 

If device tree has I2C in it, then it will reprogramming the GT refclk over I2C during boot.  The I2C can be removed from the device tree or a QPLL reset will need to be toggled. 

There are two possible ways to fix it : 

  • If QPLL reset is not connected, we need to remove I2C node.
    • add “/delete-node/ si570_2;” in system-user.dtsi to remove i2c node. it ensures the reference clock is stable during boot, As the default frequency is 156.25Mhz, so it shouldn't affect the functionality
  • If we want to keep I2C node, then please driver QPLL reset properly and toggle it when I2C re-programs the Si570.

Please let me know if it helps. 

View solution in original post

1 Reply
xud
Xilinx Employee
Xilinx Employee
287 Views
Registered: ‎08-02-2007

@desjardin 

axiethernet driver issues dma reset and poll for its completion. If completion doesn’t happen it errors out.

DMA tx and rx reset are tied to xxvethernet reset circuits and dependent on it for completion.

Firstly please try increasing the current delay of 1msec in driver, and then see if it helps.

If not, it might be related to a known issue in RoE example, which will be fixed in next release. 

In the initial release of RoE project, Ethernet IP doesn't have QPLL reset port. After RoE example upgraded to the later version, the QPLL reset is not connected.

The QPLL reset is only toggled at configuration or if QPLL reset port is toggled. 

If device tree has I2C in it, then it will reprogramming the GT refclk over I2C during boot.  The I2C can be removed from the device tree or a QPLL reset will need to be toggled. 

There are two possible ways to fix it : 

  • If QPLL reset is not connected, we need to remove I2C node.
    • add “/delete-node/ si570_2;” in system-user.dtsi to remove i2c node. it ensures the reference clock is stable during boot, As the default frequency is 156.25Mhz, so it shouldn't affect the functionality
  • If we want to keep I2C node, then please driver QPLL reset properly and toggle it when I2C re-programs the Si570.

Please let me know if it helps. 

View solution in original post