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Visitor
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Registered: ‎11-29-2018

Regarding lwIP echo server in XSDK

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Dear All,

I've used lwIP echo server example for my custom board designed with XC7Z045.

Auto-negotiation is complete. The terminal also displays the speed.

When I'm trying to ping with the board IP : 192.168.1.10. There is 100% packet loss.

Please guide me wrt this asap.

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Visitor
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Registered: ‎11-29-2018

回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

I tried lwIP echo server example with the eval board ADRV9361-7035.

With the eval board and PC - ethernet link was up and i was able to ping

With the eval board and Gigabit ethernet tester -  ethernet link was up and i was able to ping

With the custom board and PC - ethernet link was down

With the custom board and Gigabit ethernet tester  - ethernet link was up and i was not able to ping. However when I disabled the pull up of MIO pins in the Zynq core settings : ethernet link was up and i was able to ping.

I'm now testing custom board with Gigabit ethernet tester.

Thank you.

 

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Moderator
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Registered: ‎06-30-2019

回复: Regarding lwIP echo server in XSDK

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Hi @priya_mp ,

 

Can you provide the version of tools and lwip library. And which ethernet PHY you are using? Marvell, TI, Realtek or someting else?

Have checked the ip address on the computer, it should be 192.168.1.xxx.

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回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

I'm using Vivado 2018.2 and LwIP202 library.

I'm using MARVELL PHY.

I've set 192.168.1.11 in PC.

Kindly guide me wrt this.

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回复: Regarding lwIP echo server in XSDK

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Hi @priya_mp ,

 

There are some items you need to check. 

1. Hardware design. Are you using PS MIO to connect with PHY? If so, which GEM you are using, GEM0 or GEM1? And the corresponding MIO Bank voltage should be 1.8V.

2. Is ethernet cable OK? Change the cable and plug it directly between board and PC without router.

3. PC setting. The firewall need to be closed. If you have other verified board, you can toubleshoot your computer.

4. Lwip setting. Have you changed default settings? If so, please attach the system.mss file.

5. You can download wireshark to monitor host 192.168.1.10 and view the traffic.

6. Lwip has debugging function, you can trun the "lwip debug" and "tcp debug" on to check abnormal behaviour

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回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

Thanks for the response.

1. Hardware design. Are you using PS MIO to connect with PHY? If so, which GEM you are using, GEM0 or GEM1? And the corresponding MIO Bank voltage should be 1.8V.

PFA for the configuration details.

2. Is ethernet cable OK? Change the cable and plug it directly between board and PC without router.

Yes the cable is working

3. PC setting. The firewall need to be closed. If you have other verified board, you can toubleshoot your computer.

Firewall is off

4. Lwip setting. Have you changed default settings? If so, please attach the system.mss file.

I've not changed the lwIP settings. I'm using as it is.

5. You can download wireshark to monitor host 192.168.1.10 and view the traffic.

Sure will try to do it.

6. Lwip has debugging function, you can trun the "lwip debug" and "tcp debug" on to check abnormal behaviour

Sure will try to do it.

 

Please check this thread below, they say we'll have to add a patch to xadapter.c, will it solve the issue?? Kindly guide.

https://forums.xilinx.com/t5/Embedded-Development-Tools/Cannot-build-application-with-LwIP-2-0-2-FreeRTOS-10-on-Vivado/m-p/910003#M47495

 

 

configuartion.JPG
configuartion_1.JPG
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Visitor
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回复: Regarding lwIP echo server in XSDK

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回复: Regarding lwIP echo server in XSDK

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Hi @priya_mp ,

 

These threads are related to axi ethernet lite. Have you used this IP?

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回复: Regarding lwIP echo server in XSDK

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No

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回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

As said I'm not using axi ethernet lite.

I'm just doing those settings in zynq core as in the attachments.

Kindly suggest a solution.

Thank you.

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回复: Regarding lwIP echo server in XSDK

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Hi @priya_mp ,

 

Did you do some tests on xilinx evaluation boards such as zc702, zc706 or zedboard? If these boards can run the echo server, I think the problem is the phy circuit design not software develpoment.

Here are two suggestions:

1. Using MDIO Interface to read registers of PHY and check the status, you can refer to Marvell PHY data sheet.

2. Enable lwip debug setting and check the output of terminal, maybe there are some useful information.

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如果提供的信息能解决您的问题,请标记为“接受为解决方案”。
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回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

Thank you for the response , will definitely try the lwIP echo server first. Then will try to read the MDIO register and enable the lwIP in debug mode.

 

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回复: Regarding lwIP echo server in XSDK

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Hi Shengjie,

I tried lwIP echo server example with the eval board ADRV9361-7035.

With the eval board and PC - ethernet link was up and i was able to ping

With the eval board and Gigabit ethernet tester -  ethernet link was up and i was able to ping

With the custom board and PC - ethernet link was down

With the custom board and Gigabit ethernet tester  - ethernet link was up and i was not able to ping. However when I disabled the pull up of MIO pins in the Zynq core settings : ethernet link was up and i was able to ping.

I'm now testing custom board with Gigabit ethernet tester.

Thank you.

 

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