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Visitor odergut
Visitor
6,295 Views
Registered: ‎06-23-2014

Running the 1000BASE‐R PCS/PMA Core with separately generated GTX Transceiver Bank

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Hi there,

 

I have two questions regarding the usage of the 1000BASE‐X PCS/PMA Core v11.5 on a Kintex7 425T

 

1. The example design provided with the core uses the Transceiver Wizard 2.5 internally to provide a transceiver bank. However, this version might have some problems with the production silicon: The Answer Record 56454 [1] states, that version 2.6 contains fixes to support produciton silicon. Apparently, version 2.5 does not? Is it safe to use the Transceiver Wizard 2.5 to generate a transceiver bank to be used with the 1000BASE‐X PCS/PMA Core or is it necessary to upgrade to more recent version?

 

2. By default, the 1000BASE‐X PCS/PMA Core runs in combination with a transceiver bank that has a reference clock of 125 MHz. Now, I would like to connect the core to a separately generated transceiver bank that accepts a reference clock of 156.25. That way, the final system (which also has a 10 Gigabit Ethernet interface) would need only one reference clock, 156,25 MHz. The Transceiver Wizard allows me to select a reference clock of 156.25 for the Gigabit Ethernet Template. I have tried to make use of the result but the TXOUTCLK of the transceivers runs at 156.25 MHz an not (as expected) at 62.5 MHz. My question is: does this actually work? Can I run a Gigabit Ethernet transceiver bank with a reference clock of 156.25 MHz?

 

Thanks in advance for the help!

 

Georg

 

[1] http://www.xilinx.com/support/answers/56454.htm

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Visitor odergut
Visitor
11,025 Views
Registered: ‎06-23-2014

Re: Running the 1000BASE‐R PCS/PMA Core with separately generated GTX Transceiver Bank

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Regarding 1: I have not found any information about  the changes that were made to support production silicon. Fun fact: While trying to generate a transceiver bank with the Coregen Wizard 2.5, it turned out that I got different results compared to the bank generated by the 1000BASE‐R PCS/PMA Core. Obviously there are different kinds of Transceiver Wizard Version 2.5 (one released 2012-12, the other one 2013-02) and the production 1000BASE‐R PCS/PMA wizard uses some old alpha version of the transceiver wizard instead of the final release.

 

Regarding 2: After figuring out the things listed above, I realized that all I had to do was change the value of the CPLL feedback divider CPLL_FBDIV_45 from 5 to 4.

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Visitor odergut
Visitor
11,026 Views
Registered: ‎06-23-2014

Re: Running the 1000BASE‐R PCS/PMA Core with separately generated GTX Transceiver Bank

Jump to solution

Regarding 1: I have not found any information about  the changes that were made to support production silicon. Fun fact: While trying to generate a transceiver bank with the Coregen Wizard 2.5, it turned out that I got different results compared to the bank generated by the 1000BASE‐R PCS/PMA Core. Obviously there are different kinds of Transceiver Wizard Version 2.5 (one released 2012-12, the other one 2013-02) and the production 1000BASE‐R PCS/PMA wizard uses some old alpha version of the transceiver wizard instead of the final release.

 

Regarding 2: After figuring out the things listed above, I realized that all I had to do was change the value of the CPLL feedback divider CPLL_FBDIV_45 from 5 to 4.

View solution in original post

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