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wa78op
Visitor
Visitor
1,140 Views
Registered: ‎09-03-2018

SRIO IP gen2 usage problem

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Hi,all

I am using the SRIO IP gen2 core 4X 6.25Gbps in the FPGA KU035-FBVA676-1. Now I set the loopback to the 3'b010 self-loopback test. I use the NWRITE and SWRITE transfer modes and find that after the data is normally transmitted and received for about 1 hour. The FPGA debug window shows that only the TX side data is sent on the SRIO interface, but no data is received back on the RX side. I grabbed the trigger for the signal :core_received_pna, core_received_pr, core_sent_pna, core_sent_pr not set.I don't know what caused this phenomenon.

 

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karnanl
Xilinx Employee
Xilinx Employee
1,049 Views
Registered: ‎03-30-2016

Hello Yan @wa78op

 

I am sure that this is the cause.

--BTW, I am not familiar with SRIO IP.

   So, I cannot give you a comment whether sudden-stopped after one-hour is expected (instead of 2-8 hours as mentioned by the screenshot.) or not.

   But, most of Xilinx Licensed-IPs have this kind of mechanism that is automatically enabled when using evaluation license.

 

For license related matter, could you please contact Xilinx Distributor FAE/Sales  ?

 

Thanks & regards
Leo

 


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karnanl
Xilinx Employee
Xilinx Employee
1,106 Views
Registered: ‎03-30-2016

Hello @wa78op

I am not sure if i understand your question correctly.

 

So, you have found that your SRIO IP is suddenly stopped working , after normally working for about 1 hour.

Is my understanding correct ?
If yes, could you please check if you have SRIO IP license available on your PC/Vivado ?

 

Thanks & regards

Leo

 

 


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Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs
Versal Example Designs : LINK
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EC_SRIO.png
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wa78op
Visitor
Visitor
1,100 Views
Registered: ‎09-03-2018

Hello,Leo

What you understand is correct. After SRIO sends data and receives data for about 1 hour, it suddenly cannot receive data.
As for the  SRIO IP license I use, it is an evaluation version applied from Xilinx. The VIVADO SRIO IP interface displays "Hardware_Evaluation IP license available".

Thank you,

Yan

2052934254.jpg
wa78op
Visitor
Visitor
1,053 Views
Registered: ‎09-03-2018

Hi Leo,

I revisited Xilinx's instructions on the use of the Hardware Evaluation license, and the SRIO IP license I used is also a Hardware Evaluation license. Should this be the cause?

 

Thanks,

Yan

wqe.jpg
karnanl
Xilinx Employee
Xilinx Employee
1,050 Views
Registered: ‎03-30-2016

Hello Yan @wa78op

 

I am sure that this is the cause.

--BTW, I am not familiar with SRIO IP.

   So, I cannot give you a comment whether sudden-stopped after one-hour is expected (instead of 2-8 hours as mentioned by the screenshot.) or not.

   But, most of Xilinx Licensed-IPs have this kind of mechanism that is automatically enabled when using evaluation license.

 

For license related matter, could you please contact Xilinx Distributor FAE/Sales  ?

 

Thanks & regards
Leo

 


------------------------------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs
Versal Example Designs : LINK
>>------------------------------------------------------------------------------------------------

View solution in original post

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wa78op
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Visitor
1,041 Views
Registered: ‎09-03-2018

Thank you very much for your answer to this question.

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