11-03-2013 11:06 PM
Hi guys, I am doing a project in which I should transmit 192 bits but I am not getting my laneup and channel up. And what is the technique if I want to use 4 lanes as a single channel in my project.
Thank you.
Jeevan Reddy Mandali
12-04-2013 11:46 PM
11-10-2013 08:17 PM
Hi,
What version of Aurora Core are you using? Is it an 8b/10b or 64b/66b core?
11-11-2013 01:43 AM
11-27-2013 10:48 PM
Hello, thanks for your time. My lane_up, channel_up are up now, this is by adding unisim libraries in lane_init_sim.vhd. How can we say that the target bit width and number of lanes chosen does not match. How to avoid this problem. But now i am facing another problem. I am integrating a 192 bit counter.vhd, fifo to aurora 1lane, 4 byte. The data from counter should be stored in fifo, come out from fifo in 32 bits 6 times and go to aurora. I have used loopbac="010" in my project, but i am unable to receive the transmitted data on the signal rx_d_i. If you want my simulation snapshots i will post them.
11-27-2013 10:50 PM
11-27-2013 11:35 PM
Hello, here are my simulation results and black box rtl view. Please take a look.
Thanks
12-02-2013 11:51 PM
12-03-2013 09:30 PM
12-04-2013 11:46 PM