09-24-2018 12:00 AM
We could not find a module for LUT 6 instance in pattern generation module in Tri mode ethernet MAC IP V (9.0).Can anyone help to figure out that
Thanks in advance
09-26-2018 07:28 AM
Can you please clarify a bit more what you are looking for? The example design is provided AS IS to demonstrate the functionality. Are you saying you cannot get this to work or...?
09-27-2018 02:56 AM
Thanks for reply. The LUT6 is an instance mentioned in the pattern generator module(Basic_pat_gen ).
But we could not get the corresponding vhd code for that.Could you please help me in getting that
09-27-2018 03:35 AM
To generate the example design, you just need to right click on the IP (.xci file), and click on open IP example design. You should see the pattern generator generated in vivado. Let me know if you cannot see it.
09-27-2018 09:49 PM
Thanks.I have generated example design using the same steps mentioned above.
But we could not get the LUT6 inst vhdl code. only instantiation mentioned in the Basic_pat_gen top module
Could you please help us in getting the vhdl module instantiated in Basic_pat_gen module in the example design