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Contributor
Contributor
377 Views
Registered: ‎01-19-2016

VCU118 Ethernet PHY is not responding

Hello,

We have spent some time trying to get SGMII ethernet working through the RJ-45 port of the VCU118.

We have read other posts regarding this issue and have not found a working solution.  We are now trying to do a simple read from the PHY via the MDIO interface with PHY address  = 0 0011.   It appears that we are doing everything as documented in figure 17 of the TI DP83867ISRGZ PHY datasheet.  I have attached our waveforms.

Our next step is to cycle through different PHY addresses to see if any of them work.

Looking for other suggestions.

I also scratch my head and ask why didn't Xilinx test the RJ45 interface as part of the VCU118 board interface test outlined in XTP439.  Does this interface actually work?

Thanks for the help.

Roger

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ILA_MDIO_read.png
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Contributor
Contributor
371 Views
Registered: ‎01-19-2016

follow up - we just tried PHY addr 0x1111 and it we got a response from our PHY.   Interestingly enough the schematic has 0 1111 for the PHY address.  I cant explain it. This differs from all the other documentation and our review of the PHY strapping on the board itself. 

I would still appreciate an answer on the board interface tests or an eplaination of why 0 1111 is the appropriate PHY address if someone has it.

 

Thanks,

Roger

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Explorer
Explorer
239 Views
Registered: ‎08-14-2013

Not sure what the story is with the PHY address, but this repo has some MDIO init code in it that sets up the PHY on that board for operation at 10M/100M/1000M over SGMII: https://github.com/alexforencich/verilog-ethernet/tree/master/example/VCU118/fpga_1g .