12-28-2020 10:21 PM
We are using the Ethernet Marvell PHY chip(88E1116R) for our custom board which is same as zc702 - Zynq 7020 EVK board.
Issue:- we observed 1000Mbps is not working in our custom board.
BSP release:- Xilinx v2019.2 Petalinux, u-boot-2019 and 4.19 Linux Kernel
In Linux OS, If we connect the device to a 100Mbit network, then Ethernet works fine. If however we connect the device to a Gigabit Ethernet port, it negotiates gigabit speeds but transfers with high error rates and generally can't get an IP address and its reassign to 100Mbps speed. We also observed 1GHz Ethernet is not working even in u-boot.
Difference:- EVK board separate GPIO pin is been used for the PHY Reset (evk_board_phy_reset.png)but in our custom board we don't(custom_board_phy_reset.png) instead we have PHY reset on Power ON board reset.
Also attach the crystal schematics difference between EVK (evk_board_crystal.png)and our custom board(custom_board_crystal.png). Please request you to check these changes and give your suggestions.
We make sure using proper device tree, We have used the custom board dtb on EVK to validate the 1GHz Ethernet alone. And it's working fine on EVK which says there is no issue with the dts. There is no source code change in u-boot or Linux PHY driver.
We also have taken care in Vivado file generation for Ethernet configuration as same as Zc702 evk board (Vivado_enet0_clk_config.png and Vivado_enet0_pin_config.png).
Attach all PNG files for your reference.
We have been stuck into this Ethernet Issue quit long so request Xilinx team to respond and help us to resolve this issue as soon as possible.
Thanking you in Advance.
Seyed Mohamed SH.
01-08-2021 07:51 AM
Hi @seyed ,
If you are using a power on reset to the PHY, could it be when the clock is not stable yet, that the PHY is out of reset?
Is there a way to do a 2nd time reset to the PHY and see if that brings up the link?
One thing you can check is to read through MDIO and see if the registers are set as expected. Is AN enabled on both sides of the link?
In uboot, when you do dhcp, can it check out an IP address?
01-08-2021 08:00 AM - edited 01-08-2021 08:05 AM
The problems can be many....
1st of all, are you correctly configuring the PHY registers correctly for 1000Mbps mode?
If however we connect the device to a Gigabit Ethernet port, it negotiates gigabit speeds but transfers with high error rates and generally can't get an IP address and its reassign to 100Mbps speed. We also observed 1GHz Ethernet is not working even in u-boot.
For debugging, get up Wireshark running at your PC's network-card and observe the frames sent by your custom board at Gigabit rate. Are all frames broken or are some frames broken?
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem
01-08-2021 01:41 PM
Many possible problems here, including some others have pointed out:
is osc stable out of reset? can you do an MDIO port reset again to be sure?
are strapping mode resistors powered as you come out of reset? or does POR change as 1.8v is still not on so a 1.8v pullup looks like GND?
Are the MII lines the right length? It could be you have Clk->Data timing issues which do not show up at 10bT but do at the faster gigabit where you only have a 4nS DDR window to sample vs 400nS SDR. If board traces are not matched correctly are there MDIO registers to advance/retard the clock timing for TX or RX. Read your datasheet.
If the PHY itself is falling from 1G to 100bT it could be a MDI/line side electrical problem and not the MII side. Does your 1:1 transformer circuit match the Phy datasheet recomendations? Is the center of the winding energized properly? decoupled?
A bad solder joint on the RJ45 or a bad cable? 1G uses all four pair. 10/100 uses just the orange/green pairs.
01-13-2021 06:12 AM
Hi @seyed ,
Have you figured out what the issue is? If you have an update or solution, please share and update the thread. Thank you!