cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
2,787 Views
Registered: ‎04-18-2012

axi_lite_ipif_v1_01_a address decoder stuck?

Jump to solution
Hi, I am trying to read registers from a custom AXI lite peripheral. Unfortunately it seems that I can only read once; subsequent transactions don't work. Turns out that the address decoder is not recognizing the address as valid (see attachment), but it is valid (since the first transaction works, I can check that). The signal "address_in_erly" from the IPID address decoder is not asserted high for any other than the first transaction. I noticed also that the wizard does not fully respect the specifiation and fixed theses things. E.g. the spec says that the entries in IPIF_ARD_NUM_CE_ARRAY shall be powers of two --- when one selects "3 software accessible registers" in the wizard GUI, then it generates USER_SLV_NUM_REG to 3 and this woild violate the spec. Anyhow...fixing that doesn't help either. It looks like this is a bug in the address decoder. The signal "address_in_erly asserts once at 1150ns and never again, same time the chip select signals are staying invalid. Any idea why the decoder seems to be stuck? Thanks in advance, martin
0 Kudos
1 Solution

Accepted Solutions
Highlighted
Visitor
Visitor
2,994 Views
Registered: ‎04-18-2012

my bad...everthing works fine. My testbench was asserting ARVALID and the address exactly at a rising clock edge...that prevented the decoder to generate its internal start signal.

View solution in original post

0 Kudos
1 Reply
Highlighted
Visitor
Visitor
2,995 Views
Registered: ‎04-18-2012

my bad...everthing works fine. My testbench was asserting ARVALID and the address exactly at a rising clock edge...that prevented the decoder to generate its internal start signal.

View solution in original post

0 Kudos