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yhm
Adventurer
Adventurer
9,516 Views
Registered: ‎09-10-2013

ethernet communication between FPGA and PC

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Dear,all

 

As we know, we need PHY and MAC to realize the communication between FPGA and PC.

Also as we know, MAC's functions just include frame encapsulation/decapsulation, CRC check, flow control, and so on.

It seems that the MAC core do not take part in the process of link establish.

 

However, the ethernet communication link can not be built without MAC core, even though frame encapsulation/decapsulation, CRC check can be done by user logic.

In other words, if the FPGA design without MAC core, the PC can not send out packets after auto-negotiation sucess between PHYs .

I do not know why.

 

I want to know what role does the MAC core play during the process of link establish between PC and FPGA.

Or my unsdestanding is wrong?

 

Thanks

Regards

 

yhm

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techway
Observer
Observer
15,490 Views
Registered: ‎02-17-2012

Yes, PCS/PMA Core only is required to establish an ethernet link. I have already done that for 1G and 10G using PCS/PMA Core from XilinX.

 

MAC, IP, ... are almost required if you need to support  more "complexe" protocols like UDP. It is then easier to design each layer (MAC, IP, ...) individually and then connect them together. But if you just need one functionnality, ping for example, it is possible to design a "ping" block directly connected to PCS/PMA Core which will manage whole stuff necessary to reply to ping request. It will be lighter and more efficient, but it won't be able to add UDP or IP functionnalility after.

 

Hope it answers your question,

 

best regards

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3 Replies
yenigal
Xilinx Employee
Xilinx Employee
9,513 Views
Registered: ‎02-06-2013

Hi

 

At what rate are you operating the link and the interface.

 

The PHY is enough to establish a link  and it is not mandatory to have a MAC core if you can implement the MAC functionality in your user logic.

 

If you give more information of your setup(cores used),traffic being driven and the exact issue you are facing when integrating your own logic with the PHY,we can give you more suggestions.

 

 

Regards,

Satish

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yhm
Adventurer
Adventurer
9,478 Views
Registered: ‎09-10-2013

Thank you for your kind reply.

 

I am glad to tell you that I made it without the MAC core when the 100M rate.

 

Besides, I want to ask if  the link establish of 10G ethernet is also only need PHY (10GBASE_R core + GTX  + SFP+) ?

 

Reagrds!

 

yhm

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techway
Observer
Observer
15,491 Views
Registered: ‎02-17-2012

Yes, PCS/PMA Core only is required to establish an ethernet link. I have already done that for 1G and 10G using PCS/PMA Core from XilinX.

 

MAC, IP, ... are almost required if you need to support  more "complexe" protocols like UDP. It is then easier to design each layer (MAC, IP, ...) individually and then connect them together. But if you just need one functionnality, ping for example, it is possible to design a "ping" block directly connected to PCS/PMA Core which will manage whole stuff necessary to reply to ping request. It will be lighter and more efficient, but it won't be able to add UDP or IP functionnalility after.

 

Hope it answers your question,

 

best regards

View solution in original post