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robbieataeye
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Registered: ‎11-21-2019

lwip echo with sgmii

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Hi

I am trying to bring up ethernet communication on our custom board with with ultrascale+ XACU3EG and TI DP83867E. I started with lwip echo on FreeRTOS. Since the DP83867E support only SGMII I have to convert the lwip echo SDK example to SGMII.
I started by adding XEMACPS_SGMII_ENABLE_OPTION to
#define XEMACPS_DEFAULT_OPTIONS \
((u32)XEMACPS_FLOW_CONTROL_OPTION | \
(u32)XEMACPS_FCS_INSERT_OPTION | \
(u32)XEMACPS_FCS_STRIP_OPTION | \
(u32)XEMACPS_BROADCAST_OPTION | \
(u32)XEMACPS_LENTYPE_ERR_OPTION | \
(u32)XEMACPS_TRANSMITTER_ENABLE_OPTION | \
(u32)XEMACPS_RECEIVER_ENABLE_OPTION | \
(u32)XEMACPS_RX_CHKSUM_ENABLE_OPTION | \
(u32)XEMACPS_TX_CHKSUM_ENABLE_OPTION | \
(u32)XEMACPS_JUMBO_ENABLE_OPTION | \
(u32)XEMACPS_SGMII_ENABLE_OPTION)

However, both ping and telnet do not work. I am getting no receive interrupts.
This is all I got
---lwIP Socket Mode Echo server Demo Application ------
Start PHY autonegotiation
Waiting for PHY to complete autonegotiation.
autonegotiation complete
link speed for phy address 0: 1000
ERROR: DHCP request timed out
Configuring default IP of 192.168.0.10
Board IP: 192.168.0.10
Netmask : 255.255.255.0
Gateway : 192.168.0.1

              Server   Port Connect With..
-------------------- ------ --------------------
         echo server      7 $ telnet <board_ip> 7

Question

What else do I need to do?

Thanks

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robbieataeye
Visitor
Visitor
195 Views
Registered: ‎11-21-2019

Hi Nanz

Thank you for your reply. My application is for PS-GTR SGMII.

I added these 2 lines as you suggested in xemacpsif_hw.c line 84

XEmacPs_SetOptions(xemacpsp, XEMACPS_SGMII_ENABLE_OPTION);

/* pcs control autoneg enable */

XEmacPs_WriteReg(xemacpsp->Config.BaseAddress, 0x200, XEmacPs_ReadReg(xemacpsp->Config.BaseAddress, 0x200) | 0x9000);

Also I have to enable the SGMII in the TI DP83867E chip by the editing the following in xemacpsif_physpeed.c line 414

// XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_TI_CR, PHY_TI_CRVAL);

u16 phyCrSgmii = PHY_TI_CRVAL | 0x800;
XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_TI_CR, phyCrSgmii);

The lwip echo server works for me now.  Thanks

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2 Replies
nanz
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235 Views
Registered: ‎08-25-2009

Hi @robbieataeye ,

Are you talking about using PS-GTR SGMII but not the PL SGMII? Please confirm. 

Does the standalone echo sever work differently?

Basically, if using PS-GTR SGMII, you will need to do the following: 

  1. Enable SGMII in MAC here by adding the mentioned lines:

https://github.com/Xilinx/embeddedsw/blob/master/ThirdParty/sw_services/lwip211/src/contrib/ports/xilinx/netif/xemacpsif_hw.c#L84

XEmacPs_SetOptions(xemacpsp, XEMACPS_SGMII_ENABLE_OPTION);

/* pcs control autoneg enable */

XEmacPs_WriteReg(xemacpsp->Config.BaseAddress, 0x200, XEmacPs_ReadReg(xemacpsp->Config.BaseAddress, 0x200) | 0x9000);

 

  1. Add code to initialize your phy here:

https://github.com/Xilinx/embeddedsw/blob/master/ThirdParty/sw_services/lwip211/src/contrib/ports/xilinx/netif/xemacpsif_physpeed.c#L691

If your SGMII phy make is Marvell or TI, those existing functions (for RGMII) can be used as a reference and the necessary SGMII config registers should be added.


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robbieataeye
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196 Views
Registered: ‎11-21-2019

Hi Nanz

Thank you for your reply. My application is for PS-GTR SGMII.

I added these 2 lines as you suggested in xemacpsif_hw.c line 84

XEmacPs_SetOptions(xemacpsp, XEMACPS_SGMII_ENABLE_OPTION);

/* pcs control autoneg enable */

XEmacPs_WriteReg(xemacpsp->Config.BaseAddress, 0x200, XEmacPs_ReadReg(xemacpsp->Config.BaseAddress, 0x200) | 0x9000);

Also I have to enable the SGMII in the TI DP83867E chip by the editing the following in xemacpsif_physpeed.c line 414

// XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_TI_CR, PHY_TI_CRVAL);

u16 phyCrSgmii = PHY_TI_CRVAL | 0x800;
XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_TI_CR, phyCrSgmii);

The lwip echo server works for me now.  Thanks

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