UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Adventurer
Adventurer
285 Views
Registered: ‎11-27-2010

rate match between usxgmii [transceiver] and external SGMII capable PHY [third party chipset]

Hi,

background: - 

   board and tools: - zcu102+ vivado 2017.4

i have a completed usxgmii + mcdma + baremetal code .

current:- 

it works fine w.r.t to 10G, 2.5G and 1G in terms of ping and response. [both ingress and egress paths are fine]

Issue/understanding:-

In the attached diagram, there  are 3 parts

Link partner [green color 1], will refer this as part1

external SGMII capable phy [green color 2] will refer this as part2

MPSOC internal capable sgmii transceiver [green color 3] will refer this as part3

 

what i see is when part1 is at 1G, part2 is on 1G [with link partner i.e. part1] and on part3/usxgmii [i accidentally, set it to 10G] and still am able to send few packets out and receive few packets.

so i tested following and it still works: - [ofcourse, i sent few packets and received packets, no sustained line rate traffic]

part1 [1G] + part2 [1G] + part3 [1G,2.5G,10G]

part1 [10G] + part2 [10G] + part3 [1G,2.5G,10G]

i understand part3 programming is USER responsibility,but my  question is how [part1 [1G] + part2 [1G] + part3 [1G,2.5G,10G]] is this working, i expected it to not work. Please help in understand this more with detailed internals.

 

note:- i went through USXGMII manual, could not get any reasonable answer for my question.

 

Thanks

 

usxgmii_question.jpg
0 Kudos
1 Reply
Moderator
Moderator
219 Views
Registered: ‎04-01-2018

Re: rate match between usxgmii [transceiver] and external SGMII capable PHY [third party chipset]

Hi @optivareddy 

I believe the core is with the autonegotiation enabled. 

Can you please confirm with the below signals to understand this:

-ctl_umii_an_mr_an_enable

-ctl_umii_an_bypass

-----------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------------
0 Kudos