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Explorer
Explorer
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Registered: ‎04-26-2017

xapp1306 - waiting for PHY to complete autonegotiation

Hello all,

 

how are you? I am trying to make xapp1306 work to try and test the 1G PL Ethernet, however I am having some troubles.

To start with, I was not able to create a good boot image. I have three file groups:
1- fsbl

2- iperf_a53

3- pl_eth_1g_wrapper_hw_platform

 

In the first moment I put the fsbl.elf as a bootloader, the iperf_a53.elf as a data file (all in the a53 core), and finally the bitstream. As it didn't work, I tried different combinations (fsbl+iperf), (fsbl+bitstream), (iperf+bitstream). Non of these worked. So what I did was to Program the FPGA with the bitstream and launch the iPerf application, and I was able to see this:
image.png

However, it is freezed and it nevers finish the autonegotiation. 

I don't know which is the problem, neither if the way I program it is the best.

 

Could you please help me?

Thanks and best regards,

 

baldrism

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Explorer
Explorer
902 Views
Registered: ‎04-26-2017

Hello all,

 

I tried again to upload the binary files into the ZCU102 and all the time (with my images and with the ready_to_test images), there is a RED led in my FPGA that turns on, and I cannot see any output from the A53 CPU.

 

See the screenshot:

image.jpeg

 

My FPGA is the ZCU102 Rev 1.1. It is possible that this example only works for revision 1.0?

I would appreciate your opinions about this. 

 

Thanks and best regards,

 

baldrism

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Explorer
Explorer
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Registered: ‎04-26-2017

Any help???

 

baldrism

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