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nick95
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Registered: ‎02-26-2021

xemacps_example_intr_dma disable loopback

Hi everyone,

I need to send and receive raw Ethernet frames on the Xilinx Ultrascale ZCU102. I started by importing the xemacps_example_intr_dma example in Vivado, however, it works in loopback. How can I change it to make it transmit packets to another device?

 

 

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nanz
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Registered: ‎08-25-2009

Hi @nick95 ,

This specific example is generating a packet on the TX and looping it back on the RX to generate an interrupt. 

If you'd like to see the communication between two PCs, I'd suggest checking out lwip examples provided within Vitis. 


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nick95
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Registered: ‎02-26-2021

Hi @nanz,

thank you for the quick reply. I have started looking at Lwip example, however, it adds too much complexity since it's designed to work at the UDP/TCP layer while I need to work directly with ethernet frames. Looking at this link, it seems that the loopback is just a matter of a single bit to configure. However, I wonder where this happens in the sample code and if just changing that bit would be sufficient.

 

Thank you in advance

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nanz
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Registered: ‎08-25-2009

Hi @nick95 ,

Yes, it's just 1bit setting in the PHY register to do the loopback. You can just disable it. But then the app will stall on the RX and it will wait for a packet forever. But I believe you can open Wireshark on the connected PC to monitor the frame. it will be a one time testing unless you will modify the codes completely. 


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nick95
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Registered: ‎02-26-2021

Thanks, 

so once set that bit the example will transmit the frame outside and will wait for an incoming packet, but I can eventually modify the app code to avoid a stall (maybe putting the reception in a dedicated thread). Do you know exactly where and how do I need to modify the example to set such bit correctly?

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nanz
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Registered: ‎08-25-2009

HI @nick95 ,

I think it sets the loopback mode in the PHY using EmacPsUtilTiPhyLoopback in xemacps_example_util.c. 


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nick95
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Registered: ‎02-26-2021

Hi @nanz,

Thanks, I think that it is needed to change row 569 in the xemacps_example_util.c, however I'm wondering how to change just that bit.

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nick95
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Registered: ‎02-26-2021

I was able to change the loopback bit, setting it to 0 to enable normal mode, however I still do not receive any packet from the board? Is there anything that I'm missing?

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nanz
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Registered: ‎08-25-2009

HI @nick95 ,

Are you using Wireshark to listen on the PC side? Do you mean you do not see any packets coming in from the boards?

This should be the only step to disable the PHY loopback I believe. But having said that - this example design has not been tested with this setup and for this purpose. 


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nick95
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Registered: ‎02-26-2021

Hi @nanz,

yes, I'm actually using Wireshark to listen on PC side. I do not see any packet coming from the board. I understand that the example is not designed for this purpose, however, there are no examples of some code to actually send out some ethernet frames from the board?

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nanz
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Registered: ‎08-25-2009

Hi @nick95 ,

That is correct for GEM. You will need to write your own application as we do not have an example except this loopback one. Alternatively you can consider using lwip example from Vitis, when you ping from PC, the board will send response packets. All of these ICMP packets can be observed in Wireshark. 

If you are looking for a general Ethernet example and also considering using soft IPs, you could look into the IPs example designs (please check PG138 as an example) which contain a packet generator and checker that you can also target it on HW. 


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