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52 Views
Registered: ‎12-07-2018

Constraints file for ZC706 and UG954 error

UG954, User Guide for ZC706 board, has recently (6/Aug/2019) been updated. The previous version had a section detailing constraints for pin out and IO standards. This has now been removed and a link to the Xilinx website added. I can not find a constraints file for the ZC706 board.

Also the info regarding the user LED IO standard was (potentially) wrong in the previous version. One table showed all 4 LEDs using LVCMOS25. But the constaints section showed only 2 were LVCMOS25 and 2 were LVCMOS15. I came across a forum thread where Xilinx admitted the UG was in error, and there should be two IO standards See

https://forums.xilinx.com/t5/Embedded-Processor-System-Design/Wrong-user-LEDs-IO-standard-in-ZC706-documentation/td-p/765819.

Unfortunately the table has not been corrected in the recent updated.

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-06-2018

Re: Constraints file for ZC706 and UG954 error

Hi @xilinx_bj_1905 ,

Yes, you are right in UG954 (v1.8) August 6, 2019, still A17 and G2 are shown as LVCMOS 25 instead of LVCMOS 15. I will check internally to update the same.

But you can download the XDC File from this LINK. This XDC file has updated, A17 and G2 pin to LVCMOS 15 IO standard.

Hope this helps.

Regards,

Deepak D N

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